[Intel-gfx] [PATCH] drm/i915: Disable lazy PPGTT page table optimization for vGPU

[Zhenyu Wang]

On 2017.10.18 13:25:43 +0300, Joonas Lahtinen wrote:
> When running under virtualization (vGPU active), we must disable
> the azy PPGTT page table initialization optimization introduced by:
> 
> 14826673247e ("drm/i915: Only initialize partially filled pagetables")
> 
> We must do this because GVT-g makes unduly assumptions about guest
> behaviour, which this optimization breaks. This results in following
> looking errors in the host:
> 
> ERROR gvt: guest page write error -22, gfn 0x7ada8, pa 0x7ada89a8, var 0x6, len 1
> 
> The real fix is to not to depend on i915 driver behaviour, but instead
> either rely on only the contracts that i915 has with the hardware, or
> add some paravirtualization. While the real fix is en route, it won't
> be finished in time for 4.15, so the best option is to disable the
> optimization for now when vGPU is active to avoid breaking 4.15 guests
> in existing VM environments.
> 
> Fixes: 14826673247e ("drm/i915: Only initialize partially filled pagetables")
> Suggested-by: Xiaolin Zhang <xiaolin.zhang at intel.com>
> Signed-off-by: Xiaolin Zhang <xiaolin.zhang at intel.com>
> [Joonas: Rewrote the commit message and added tags.]
> Signed-off-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Zhenyu Wang <zhenyuw at linux.intel.com>
> Cc: Zhi Wang <zhi.a.wang at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Jani Nikula <jani.nikula at linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 527a2d2d6281..5eaa6893daaa 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -1341,7 +1341,7 @@ static int gen8_ppgtt_alloc_pd(struct i915_address_space *vm,
>  			if (IS_ERR(pt))
>  				goto unwind;
>  
> -			if (count < GEN8_PTES)
> +			if (count < GEN8_PTES || intel_vgpu_active(vm->i915))
>  				gen8_initialize_pt(vm, pt);
>  
>  			gen8_ppgtt_set_pde(vm, pd, pt, pde);
> -- 

Acked-by: Zhenyu Wang <zhenyuw at linux.intel.com>

As this optimization would be broken on older kernel for GVT-g, final fix
need to do compat check to really enable this. So ok to fallback for now.

thanks

-- 
Open Source Technology Center, Intel ltd.

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