[Intel-gfx] [PATCH RESEND FOR CI] drm/i915: remove g4x lowfreq_avail and has_pipe_cxsr

[Jani Nikula]

On Tue, 17 Oct 2017, Jani Nikula <jani.nikula at intel.com> wrote:
> They're unused and unsupported. Leave the reduced_clock pointers in
> place still, should they prove useful later on.
>
> v2: go from nuking DDI lowfreq_avail to nuking it entirely (Ville)
>
> Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Suggested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>

Pushed to dinq, thanks for the review.

BR,
Jani.

> ---
>  drivers/gpu/drm/i915/i915_drv.h      |  2 --
>  drivers/gpu/drm/i915/i915_pci.c      |  2 --
>  drivers/gpu/drm/i915/intel_display.c | 15 ---------------
>  drivers/gpu/drm/i915/intel_drv.h     |  1 -
>  4 files changed, 20 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index dd141b250583..084822b4e7fa 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -785,7 +785,6 @@ struct intel_csr {
>  	func(has_logical_ring_contexts); \
>  	func(has_logical_ring_preemption); \
>  	func(has_overlay); \
> -	func(has_pipe_cxsr); \
>  	func(has_pooled_eu); \
>  	func(has_psr); \
>  	func(has_rc6); \
> @@ -3173,7 +3172,6 @@ intel_info(const struct drm_i915_private *dev_priv)
>  #define I915_HAS_HOTPLUG(dev_priv)	((dev_priv)->info.has_hotplug)
>  
>  #define HAS_FW_BLC(dev_priv) 	(INTEL_GEN(dev_priv) > 2)
> -#define HAS_PIPE_CXSR(dev_priv) ((dev_priv)->info.has_pipe_cxsr)
>  #define HAS_FBC(dev_priv)	((dev_priv)->info.has_fbc)
>  #define HAS_CUR_FBC(dev_priv)	(!HAS_GMCH_DISPLAY(dev_priv) && INTEL_INFO(dev_priv)->gen >= 7)
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index bf467f30c99b..c162477ad1ff 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -193,7 +193,6 @@ static const struct intel_device_info intel_i965gm_info __initconst = {
>  static const struct intel_device_info intel_g45_info __initconst = {
>  	GEN4_FEATURES,
>  	.platform = INTEL_G45,
> -	.has_pipe_cxsr = 1,
>  	.ring_mask = RENDER_RING | BSD_RING,
>  };
>  
> @@ -201,7 +200,6 @@ static const struct intel_device_info intel_gm45_info __initconst = {
>  	GEN4_FEATURES,
>  	.platform = INTEL_GM45,
>  	.is_mobile = 1, .has_fbc = 1,
> -	.has_pipe_cxsr = 1,
>  	.supports_tv = 1,
>  	.ring_mask = RENDER_RING | BSD_RING,
>  };
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 897fe7e0cce5..ac72be52de47 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6522,11 +6522,9 @@ static void i9xx_update_pll_dividers(struct intel_crtc *crtc,
>  
>  	crtc_state->dpll_hw_state.fp0 = fp;
>  
> -	crtc->lowfreq_avail = false;
>  	if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS) &&
>  	    reduced_clock) {
>  		crtc_state->dpll_hw_state.fp1 = fp2;
> -		crtc->lowfreq_avail = true;
>  	} else {
>  		crtc_state->dpll_hw_state.fp1 = fp;
>  	}
> @@ -7221,15 +7219,6 @@ static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc)
>  		}
>  	}
>  
> -	if (HAS_PIPE_CXSR(dev_priv)) {
> -		if (intel_crtc->lowfreq_avail) {
> -			DRM_DEBUG_KMS("enabling CxSR downclocking\n");
> -			pipeconf |= PIPECONF_CXSR_DOWNCLOCK;
> -		} else {
> -			DRM_DEBUG_KMS("disabling CxSR downclocking\n");
> -		}
> -	}
> -
>  	if (intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) {
>  		if (INTEL_GEN(dev_priv) < 4 ||
>  		    intel_crtc_has_type(intel_crtc->config, INTEL_OUTPUT_SDVO))
> @@ -8365,8 +8354,6 @@ static int ironlake_crtc_compute_clock(struct intel_crtc *crtc,
>  	memset(&crtc_state->dpll_hw_state, 0,
>  	       sizeof(crtc_state->dpll_hw_state));
>  
> -	crtc->lowfreq_avail = false;
> -
>  	/* CPU eDP is the only output that doesn't need a PCH PLL of its own. */
>  	if (!crtc_state->has_pch_encoder)
>  		return 0;
> @@ -9025,8 +9012,6 @@ static int haswell_crtc_compute_clock(struct intel_crtc *crtc,
>  		}
>  	}
>  
> -	crtc->lowfreq_avail = false;
> -
>  	return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 86eed3c7828b..c0d8b2d9ecdd 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -803,7 +803,6 @@ struct intel_crtc {
>  	 * some outputs connected to this crtc.
>  	 */
>  	bool active;
> -	bool lowfreq_avail;
>  	u8 plane_ids_mask;
>  	unsigned long long enabled_power_domains;
>  	struct intel_overlay *overlay;

-- 
Jani Nikula, Intel Open Source Technology Center