[Intel-gfx] [PATCH 1/2] drm/dp: Bit definition for D3 power state that keeps AUX fully powered

[Jani Nikula]

On Thu, 26 Oct 2017, "Pandiyan, Dhinakaran" <dhinakaran.pandiyan at intel.com> wrote:
> On Thu, 2017-10-26 at 10:59 +0300, Jani Nikula wrote:
>> On Thu, 10 Aug 2017, Dhinakaran Pandiyan <dhnkrn at gmail.com> wrote:
>> > DPCD 600h - SET_POWER & SET_DP_PWR_VOLTAGE defines power state
>> >
>> > 101 = Set Main-Link for local Sink device and all downstream Sink
>> > devices to D3 (power-down mode), keep AUX block fully powered, ready to
>> > reply within a Response Timeout period of 300us.
>> >
>> > This state is useful in a MST dock + MST monitor configuration that
>> > doesn't wake up from D3 state.
>> 
>> Dhinakaran, these two seem to have fallen through the cracks, please
>> resend.
>> 
>
> So the "drm/dp/mst: Sideband message transaction to power up/down nodes"
> series I sent fixed the DPMS issues I was seeing with my setup. We'll
> have to evaluate whether this patch is still useful for anyone (probably
> https://bugs.freedesktop.org/show_bug.cgi?id=90963).

Well, we could pick patch 1/2 in the mean time. No harm in that.

BR,
Jani.

>
>
>> Sorry & thanks,
>> Jani.
>> 
>> 
>> >
>> > Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
>> > ---
>> >  include/drm/drm_dp_helper.h | 9 +++++----
>> >  1 file changed, 5 insertions(+), 4 deletions(-)
>> >
>> > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
>> > index b17476a..d77e0f5 100644
>> > --- a/include/drm/drm_dp_helper.h
>> > +++ b/include/drm/drm_dp_helper.h
>> > @@ -614,10 +614,11 @@
>> >  #define DP_BRANCH_HW_REV                    0x509
>> >  #define DP_BRANCH_SW_REV                    0x50A
>> >  
>> > -#define DP_SET_POWER                        0x600
>> > -# define DP_SET_POWER_D0                    0x1
>> > -# define DP_SET_POWER_D3                    0x2
>> > -# define DP_SET_POWER_MASK                  0x3
>> > +#define DP_SET_POWER			0x600
>> > +# define DP_SET_POWER_D0		0x1
>> > +# define DP_SET_POWER_D3		0x2
>> > +# define DP_SET_POWER_MASK		0x3
>> > +# define DP_SET_POWER_D3_AUX_ON		0x5
>> >  
>> >  #define DP_EDP_DPCD_REV			    0x700    /* eDP 1.2 */
>> >  # define DP_EDP_11			    0x00
>> 

-- 
Jani Nikula, Intel Open Source Technology Center