[Intel-gfx] ✓ Fi.CI.BAT: success for GuC based reset engine
Chris Wilson
chris at chris-wilson.co.uk
Mon Oct 30 21:14:00 UTC 2017
Quoting Patchwork (2017-10-30 20:05:05)
> == Series Details ==
>
> Series: GuC based reset engine
> URL : https://patchwork.freedesktop.org/series/32859/
> State : success
>
> == Summary ==
>
> Series 32859v1 GuC based reset engine
> https://patchwork.freedesktop.org/api/1.0/series/32859/revisions/1/mbox/
>
> Test chamelium:
> Subgroup dp-crc-fast:
> pass -> FAIL (fi-kbl-7500u) fdo#102514
> Test gem_exec_suspend:
> Subgroup basic-s3:
> pass -> DMESG-WARN (fi-cfl-s) fdo#103186
> Test kms_pipe_crc_basic:
> Subgroup suspend-read-crc-pipe-c:
> incomplete -> PASS (fi-bxt-dsi)
> Test pm_rpm:
> Subgroup basic-pci-d3-state:
> incomplete -> FAIL (fi-bxt-j4205)
35686a44e4b8 drm/i915: Use intel_ddi_get_config() for MST
1939ba51fd05 drm/i915: Pass a crtc state to ddi post_disable from MST code
bb911536f07e drm/i915: Eliminate pll->state usage from bxt_calc_pll_link()
0fce04c8764b drm/i915: Nuke intel_ddi_get_encoder_port()
7e732cacb1ae drm/i915: Stop frobbing with DDI encoder->type
e1214b95ed83 drm/i915: Populate output_types from .get_config()
d6038611aa3d drm/i915: Parse max HDMI TMDS clock from VBT
6e8fbf8d19e4 drm/i915/vbt: Fix HDMI level shifter and max data rate bitfield sizes
2dd14a4ad87f drm-tip: 2017y-10m-30d-13h-40m-22s UTC integration manifest
0b07194bb55e Linux 4.14-rc7
From the rc7 patchset, my guess would be
0cc2b4e5a020 PM / QoS: Fix device resume latency PM QoS
Anyway, someone has a fun bisect task on their hang; it should be very
quick.
-Chris
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