[Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the BCLK.

[Pandiyan, Dhinakaran]

On Sun, 2017-10-29 at 03:04 +0000, Kumar, Abhay wrote:
> + Subhransu
> 
> -----Original Message-----
> From: Intel-gfx [mailto:intel-gfx-bounces at lists.freedesktop.org] On Behalf Of Kumar, Abhay
> Sent: Thursday, October 26, 2017 12:10 PM
> To: Jani Nikula <jani.nikula at linux.intel.com>; Dhinakaran Pandiyan <dhinakaran.pandiyan at gmail.com>; subransu.s.prusty at intel.com
> Cc: intel-gfx at lists.freedesktop.org; Nujella, Sathyanarayana <sathyanarayana.nujella at intel.com>
> Subject: Re: [Intel-gfx] [PATCH] drm/i915: set minimum CD clock to twice the BCLK.
> 
> 
> 
> On 10/26/2017 1:45 AM, Jani Nikula wrote:
> > On Wed, 25 Oct 2017, Dhinakaran Pandiyan <dhinakaran.pandiyan at gmail.com> wrote:
> >> On Wednesday, October 25, 2017 3:02:12 PM PDT abhay.kumar at intel.com wrote:
> >>> From: Abhay Kumar <abhay.kumar at intel.com>
> >>>
> >>> In glk when device boots with only 1366x768 panel, HDA codec doesn't comeup.
> >>> This result in no audio forever as cdclk is < 96Mhz.
> > Forever... or until next modeset with audio enabled?
> 
> Soundcard probing/detection and creation happens only during bootup.  So even though we do modeset later there is no soundcard driver to handle the event.
> >
> >>> This chagne will ensure CD clock to be twice of  BCLK.
> >>>
> >>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102937
> >>> Signed-off-by: Abhay Kumar <abhay.kumar at intel.com>
> >>> ---
> >>>   drivers/gpu/drm/i915/intel_cdclk.c | 2 +-
> >>>   1 file changed, 1 insertion(+), 1 deletion(-)
> >>>
> >>> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c
> >>> b/drivers/gpu/drm/i915/intel_cdclk.c index 
> >>> e8884c2ade98..185a70f0921c
> >>> 100644
> >>> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> >>> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> >>> @@ -1920,7 +1920,7 @@ int intel_crtc_compute_min_cdclk(const struct 
> >>> intel_crtc_state *crtc_state) /* According to BSpec, "The CD clock 
> >>> frequency must be at least twice * the frequency of the Azalia 
> >>> BCLK." and BCLK is 96 MHz by default. */
> >>> -	if (crtc_state->has_audio && INTEL_GEN(dev_priv) >= 9)
> >>> +	if (INTEL_GEN(dev_priv) >= 9)
> >> Why should cdclk be increased when audio is not being enabled?
> > Indeed. I can easily imagine a counter-bug reporting excessive cdclk 
> > when audio is not enabled.
> During bootup time audio driver is trying to acquire HDA audio power well inside i915 and then it will send HDA verb commands.
> since cdclk is lower than 96Mhz  HDA will not comeup resulting in timeout.  This was working fine  before SKL/APL since there was no 2 PPC .
> 
> Is it ok to bump  up cdclk while bootup of system/HDA and then reduce to needed CDCLK?

I think it is worth exploring, do you have code to test whether it
solves this particular issue?

> wondering if this approach can cause any issue to subsequent HDA verb commands ..
> 
> 
> >
> > BR,
> > Jani.
> >
> >>>   		min_cdclk = max(2 * 96000, min_cdclk);
> >>>
> >>>   	if (min_cdclk > dev_priv->max_cdclk_freq) {
> >>
> >> _______________________________________________
> >> Intel-gfx mailing list
> >> Intel-gfx at lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
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