[Intel-gfx] [PATCH] drm/i915: Transform WaInPlaceDecompressionHang to a simple reg write

[Chris Wilson]

Quoting Oscar Mateo (2017-09-06 22:12:11)
> Afaict, GEN9_GAMT_ECO_REG_RW_IA does not live in the context, so writing
> it on every context creation is overkill (and wrong).
> 
> Cc: Mika Kuoppala <mika.kuoppala at intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_engine_cs.c | 25 +++++++++++++++----------
>  1 file changed, 15 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 23812ec..9f01a5c 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -985,8 +985,9 @@ static int skl_init_workarounds(struct intel_engine_cs *engine)
>  
>         /* WaInPlaceDecompressionHang:skl */
>         if (IS_SKL_REVID(dev_priv, SKL_REVID_H0, REVID_FOREVER))
> -               WA_SET_BIT(GEN9_GAMT_ECO_REG_RW_IA,
> -                          GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);

Anything using a precalculated RMW value for a ctx register is indeed
fishy. Whilst you are checking this register, can you check whether the
other users of WA_SET_BIT/WA_CLR_BIT are indeed context bound?
-Chris