[Intel-gfx] [PATCH v6 1/2] drm/i915: Introduce INTEL_GEN_MASK
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Mon Sep 11 15:36:24 UTC 2017
On 11/09/2017 13:32, Joonas Lahtinen wrote:
> Split INTEL_GEN_MASK out of IS_GEN macro, and make it usable
> within static declarations (unlike combound statements).
Typo -> compound to fixup when merging.
Regards,
Tvrtko
>
> Signed-off-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>
> Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 22 ++++++++++------------
> 1 file changed, 10 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 63ca2ffcafef..c3f9d7d7b146 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2873,23 +2873,21 @@ intel_info(const struct drm_i915_private *dev_priv)
> #define INTEL_REVID(dev_priv) ((dev_priv)->drm.pdev->revision)
>
> #define GEN_FOREVER (0)
> +
> +#define INTEL_GEN_MASK(s, e) ( \
> + BUILD_BUG_ON_ZERO(!__builtin_constant_p(s)) + \
> + BUILD_BUG_ON_ZERO(!__builtin_constant_p(e)) + \
> + GENMASK((e) != GEN_FOREVER ? (e) - 1 : BITS_PER_LONG - 1, \
> + (s) != GEN_FOREVER ? (s) - 1 : 0) \
> +)
> +
> /*
> * Returns true if Gen is in inclusive range [Start, End].
> *
> * Use GEN_FOREVER for unbound start and or end.
> */
> -#define IS_GEN(dev_priv, s, e) ({ \
> - unsigned int __s = (s), __e = (e); \
> - BUILD_BUG_ON(!__builtin_constant_p(s)); \
> - BUILD_BUG_ON(!__builtin_constant_p(e)); \
> - if ((__s) != GEN_FOREVER) \
> - __s = (s) - 1; \
> - if ((__e) == GEN_FOREVER) \
> - __e = BITS_PER_LONG - 1; \
> - else \
> - __e = (e) - 1; \
> - !!((dev_priv)->info.gen_mask & GENMASK((__e), (__s))); \
> -})
> +#define IS_GEN(dev_priv, s, e) \
> + (!!((dev_priv)->info.gen_mask & INTEL_GEN_MASK((s), (e))))
>
> /*
> * Return true if revision is in range [since,until] inclusive.
>
More information about the Intel-gfx
mailing list