[Intel-gfx] [PATCH] drm/i915: Disable DMC powersaving during GT operations

[Chris Wilson]

The DMC typifies the worst example of firmware: it overrides system
behaviour and is fubar. When no displays are active, the DMC appears to
continually toggle its control register trying to change display power
states. This in turn has the side effect of slowing down the GT by a few
orders of magntidue, making headless operations intolerably slow.

This seems to affect all machines with dmc (so a byproduct of the dmc
code itself being shared) and severely limits throughput on the CI bxt
and triggers the watchdog for incomplete tests.

Altenative suggestion is to blacklist all DMC firmware until it is
fixed.

References: https://bugs.freedesktop.org/show_bug.cgi?id=100572
Testcase: igt/gem_exec_nop/headless
Suggested-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Imre Deak <imre.deak at intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c         | 3 +++
 drivers/gpu/drm/i915/i915_gem_request.c | 3 +++
 2 files changed, 6 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index ba72a4bdaa78..e3236c1d44f0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3331,6 +3331,9 @@ i915_gem_idle_work_handler(struct work_struct *work)
 	intel_engines_mark_idle(dev_priv);
 	i915_gem_timelines_mark_idle(dev_priv);
 
+	if (dev_priv->csr.dmc_payload)
+		intel_display_power_put(dev_priv, POWER_DOMAIN_MODESET);
+
 	GEM_BUG_ON(!dev_priv->gt.awake);
 	dev_priv->gt.awake = false;
 	rearm_hangcheck = false;
diff --git a/drivers/gpu/drm/i915/i915_gem_request.c b/drivers/gpu/drm/i915/i915_gem_request.c
index 813a3b546d6e..3c8ebdb5b0b4 100644
--- a/drivers/gpu/drm/i915/i915_gem_request.c
+++ b/drivers/gpu/drm/i915/i915_gem_request.c
@@ -254,6 +254,9 @@ static void mark_busy(struct drm_i915_private *i915)
 	intel_runtime_pm_get_noresume(i915);
 	i915->gt.awake = true;
 
+	if (i915->csr.dmc_payload)
+		intel_display_power_get(i915, POWER_DOMAIN_MODESET);
+
 	intel_enable_gt_powersave(i915);
 	i915_update_gfx_val(i915);
 	if (INTEL_GEN(i915) >= 6)
-- 
2.14.1