[Intel-gfx] [PATCH] drm/i915/spt+: Don't reset invalid AUX channel interrupt bits in SDEIMR

[Rodrigo Vivi]

On Tue, Sep 12, 2017 at 10:30 AM, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
> On Sat, Sep 09, 2017 at 12:42:55AM +0000, Dhinakaran Pandiyan wrote:
>> The SDE interrupt bits 25, 26 and 27 are either reserved or meant for
>> DDI E hotplug in SPT+. These bits are meant for AUX channels only in LPT
>> and CPT, so add the appropriate checks.
>>
>> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

merged to dinq. thanks for the patch.

>
>> ---
>>  drivers/gpu/drm/i915/i915_irq.c | 4 +++-
>>  1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
>> index 5d391e689070..91a2c5dbf2da 100644
>> --- a/drivers/gpu/drm/i915/i915_irq.c
>> +++ b/drivers/gpu/drm/i915/i915_irq.c
>> @@ -3241,8 +3241,10 @@ static void ibx_irq_postinstall(struct drm_device *dev)
>>
>>       if (HAS_PCH_IBX(dev_priv))
>>               mask = SDE_GMBUS | SDE_AUX_MASK | SDE_POISON;
>> -     else
>> +     else if (HAS_PCH_CPT(dev_priv) || HAS_PCH_LPT(dev_priv))
>
> I was going to ask about PPT but I then noticed:
> /* PantherPoint is CPT compatible */
>
>
>>               mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT;
>> +     else
>> +             mask = SDE_GMBUS_CPT;
>>
>>       gen5_assert_iir_is_zero(dev_priv, SDEIIR);
>>       I915_WRITE(SDEIMR, ~mask);
>> --
>> 2.11.0
>>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br