[Intel-gfx] [PATCH] drm/i915: Disable DMC powersaving during GT operations
Imre Deak
imre.deak at intel.com
Wed Sep 13 09:08:54 UTC 2017
On Tue, Sep 12, 2017 at 01:57:07PM +0100, Tvrtko Ursulin wrote:
>
> On 12/09/2017 13:45, Tvrtko Ursulin wrote:
> >
> > On 12/09/2017 13:37, Chris Wilson wrote:
> > > The DMC typifies the worst example of firmware: it overrides system
> > > behaviour and is fubar. When no displays are active, the DMC appears to
> > > continually toggle its control register trying to change display power
> > > states. This in turn has the side effect of slowing down the GT by a few
> > > orders of magntidue, making headless operations intolerably slow.
> > >
> > > This seems to affect all machines with dmc (so a byproduct of the dmc
> > > code itself being shared) and severely limits throughput on the CI bxt
> > > and triggers the watchdog for incomplete tests.
> > >
> > > Altenative suggestion is to blacklist all DMC firmware until it is
> > > fixed.
> >
> > I've sent this as https://patchwork.freedesktop.org/patch/154942/ some
> > time ago. You asked for a long code comment back then. :)
> >
> > Anyway, I don't mind we merge one of the two since it is taking an
> > eternity to get this fixes in the firmware. So:
> >
> > Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>
> I take it back, there was a reason in shape of another firmware bug which
> made us put this patch on hold. Imre might know the status of that one.
Yes, there is a corruption of registes in the context saved/restored during
DC3->DC6 transitions. I have a test case which easily triggers this, but
I was asked to produce an internal trace in addition. To set up that
took me quite a while, but I got the trace now and the firwmare team is
checking it. Let's see if it includes everything they hope to see.
So ideally we'd wait with your W/A - which still is the correct thing -
until the corruption thing is fixed.
--Imre
>
> Regards,
>
> Tvrtko
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