[Intel-gfx] [PATCH] drm/i915: Return IDI Hash Mask setup for gen9+

[Rodrigo Vivi]

Spec teels:
"It is required for GFX Driver to set [19:16] to 1 when
eDRAM configuration is enabled."

This basically reverts commit 666fbcf5c21d ("drm/i915: Don't
program eLLC IDI hash mask for gen9+")

This requirement hasn't changed since HSW up to CNL.
But that commit was created before EDRAM was properly
organized with commit 3accaf7e734d ("drm/i915: Store
and use edram capabilities")

Cc: Mika Kuoppala <mika.kuoppala at intel.com>
Cc: Matthew Auld <matthew.auld at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index f445587c1a4b..25b59dbb29b0 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -4714,7 +4714,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
 	/* Double layer security blanket, see i915_gem_init() */
 	intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
 
-	if (HAS_EDRAM(dev_priv) && INTEL_GEN(dev_priv) < 9)
+	if (HAS_EDRAM(dev_priv))
 		I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
 
 	if (IS_HASWELL(dev_priv))
-- 
2.13.5