[Intel-gfx] [PATCH 07/29] drm/i915: Inline the required bits of intel_ddi_post_disable() into intel_ddi_fdi_post_disable()

[Jani Nikula]

On Mon, 18 Sep 2017, Ville Syrjala <ville.syrjala at linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> To untangle the mess that is intel_ddi_post_disable() move the the bits
> needed by FDI into intel_ddi_fdi_post_disable(). This way we can stop
> worrying about FDI in intel_ddi_post_disable().
>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 2dbbd47665de..bbb08c6f0bba 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2321,7 +2321,8 @@ void intel_ddi_fdi_post_disable(struct intel_encoder *encoder,
>  	val &= ~FDI_RX_ENABLE;
>  	I915_WRITE(FDI_RX_CTL(PIPE_A), val);
>  
> -	intel_ddi_post_disable(encoder, old_crtc_state, old_conn_state);
> +	intel_disable_ddi_buf(encoder);
> +	intel_ddi_clk_disable(encoder);
>  
>  	val = I915_READ(FDI_RX_MISC(PIPE_A));
>  	val &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);

-- 
Jani Nikula, Intel Open Source Technology Center