[Intel-gfx] [PATCH 2/2] drm/i915/lrc: Skip no-op per-bb buffer on gen9
Tvrtko Ursulin
tvrtko.ursulin at linux.intel.com
Thu Sep 21 15:12:21 UTC 2017
On 21/09/2017 14:54, Chris Wilson wrote:
> Since we inherited the context image setup from gen8 which needed a
> per-bb workaround (for GPGPU), we are submitting an empty per-bb buffer
> on gen9. Now that we can skip adding the buffer to the context image,
> remove the dangling per-bb. This slightly improves execution latency,
> most notably on an idle engine.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=87725
How much of the 7% we get back? :)
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> ---
> drivers/gpu/drm/i915/intel_lrc.c | 9 +--------
> 1 file changed, 1 insertion(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index 297c9c1564e5..91a5411bb9da 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -1171,13 +1171,6 @@ static u32 *gen9_init_indirectctx_bb(struct intel_engine_cs *engine, u32 *batch)
> return batch;
> }
>
> -static u32 *gen9_init_perctx_bb(struct intel_engine_cs *engine, u32 *batch)
> -{
> - *batch++ = MI_BATCH_BUFFER_END;
> -
> - return batch;
> -}
> -
> #define CTX_WA_BB_OBJ_SIZE (PAGE_SIZE)
>
> static int lrc_setup_wa_ctx(struct intel_engine_cs *engine)
> @@ -1234,7 +1227,7 @@ static int intel_init_workaround_bb(struct intel_engine_cs *engine)
> return 0;
> case 9:
> wa_bb_fn[0] = gen9_init_indirectctx_bb;
> - wa_bb_fn[1] = gen9_init_perctx_bb;
> + wa_bb_fn[1] = NULL;
> break;
> case 8:
> wa_bb_fn[0] = gen8_init_indirectctx_bb;
>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
Regards,
Tvrtko
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