[Intel-gfx] [PATCH v2 03/11] drm/i915/preempt: Fix WaEnablePreemptionGranularityControlByUMD
Joonas Lahtinen
joonas.lahtinen at linux.intel.com
Thu Sep 28 12:06:43 UTC 2017
On Wed, 2017-09-27 at 17:44 +0100, Chris Wilson wrote:
> From: Jeff McGee <jeff.mcgee at intel.com>
>
> The WA applies to all production Gen9 and requires both enabling and
> whitelisting of the per-context preemption control register.
>
> Signed-off-by: Jeff McGee <jeff.mcgee at intel.com>
> Signed-off-by: MichaĆ Winiarski <michal.winiarski at intel.com>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
<SNIP>
> ---
> drivers/gpu/drm/i915/intel_engine_cs.c | 12 +++---------
> 1 file changed, 3 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index a28e2a864cf1..af3fe494a429 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -1077,7 +1077,9 @@ static int gen9_init_workarounds(struct intel_engine_cs *engine)
> return ret;
>
> /* WaEnablePreemptionGranularityControlByUMD:skl,bxt,kbl,cfl */
To have the record correct, this applies to CNL too.
Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Regards, Joonas
--
Joonas Lahtinen
Open Source Technology Center
Intel Corporation
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