[Intel-gfx] [RFC PATCH v2 4/5] drm/i915: Record the sseu configuration per-context & engine

[Joonas Lahtinen]

On Fri, 2017-09-22 at 16:10 +0100, Lionel Landwerlin wrote:
> From: Chris Wilson <chris at chris-wilson.co.uk>
> 
> We want to expose the ability to reconfigure the slices, subslice and
> eu per context and per engine. To facilitate that, store the current
> configuration on the context for each engine, which is initially set
> to the device default upon creation.
> 
> v2: record sseu configuration per context & engine (Chris)
> 
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>

<SNIP>

> @@ -158,6 +177,8 @@ struct i915_gem_context {
>  		u64 lrc_desc;
>  		int pin_count;
>  		bool initialised;
> +		/** sseu: Control eu/slice partitioning */

Consistently "EU" vs "eu" as this goes to HTML docs.

> @@ -1889,8 +1889,7 @@ int logical_xcs_ring_init(struct intel_engine_cs *engine)
>  	return logical_ring_init(engine);
>  }
>  
> -static u32
> -make_rpcs(struct drm_i915_private *dev_priv)
> +static u32 make_rpcs(const struct sseu_dev_info *sseu)

That's bit of an extra noise, but the return is unlikely to be
changed... So inconclusive.

Reviewed-by: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>

Regards, Joonas
-- 
Joonas Lahtinen
Open Source Technology Center
Intel Corporation