[Intel-gfx] [PATCH 11/12] drm/i915/cnl: Invert dvfs default level.

[Rodrigo Vivi]

According to spec "If voltage is set too low,
it will break functionality. If voltage is set too high,
 it will waste power."

So, let's prefer the waste of power instead of breaking
functionality.

But also the logic of deciding the level on spec
tells "Else, use level 2."
So, default is actually "2", not "0".

Cc: Mika Kahola <mika.kahola at intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
---
 drivers/gpu/drm/i915/intel_cdclk.c    | 8 ++++----
 drivers/gpu/drm/i915/intel_dpll_mgr.c | 8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
index 516cd4f920b5..f2629dbec763 100644
--- a/drivers/gpu/drm/i915/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/intel_cdclk.c
@@ -1571,15 +1571,15 @@ static void cnl_set_cdclk(struct drm_i915_private *dev_priv,
 	}
 
 	switch (cdclk) {
-	case 528000:
-		pcu_ack = 2;
+	case 168000:
+		pcu_ack = 0;
 		break;
 	case 336000:
 		pcu_ack = 1;
 		break;
-	case 168000:
+	case 528000:
 	default:
-		pcu_ack = 0;
+		pcu_ack = 2;
 		break;
 	}
 
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index f6b58879ac6a..6bbc3d718e78 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -2076,15 +2076,15 @@ static void cnl_ddi_pll_disable(struct drm_i915_private *dev_priv,
 	 */
 	cdclk = dev_priv->cdclk.hw.cdclk;
 	switch (cdclk) {
-	case 528000:
-		level = 2;
+	case 168000:
+		level = 0;
 		break;
 	case 336000:
 		level = 1;
 		break;
-	case 168000:
+	case 528000:
 	default:
-		level = 0;
+		level = 2;
 		break;
 	}
 	change_level = cnl_dvfs_need_change(dev_priv, level);
-- 
2.13.5