[Intel-gfx] [PATCH 8/9] drm/i915: Move intel_guc_suspend/resume to guc.c
Sagar Arun Kamble
sagar.a.kamble at intel.com
Sat Sep 30 17:37:12 UTC 2017
On 9/29/2017 11:11 PM, Michal Wajdeczko wrote:
> We want to keep GuC functions together.
> Signatures of the function will be changed in upcoming patch.
>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Reviewed-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
> ---
> drivers/gpu/drm/i915/i915_guc_submission.c | 52 ----------------------------
> drivers/gpu/drm/i915/intel_guc.c | 54 ++++++++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_guc.h | 4 +--
> 3 files changed, 56 insertions(+), 54 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
> index 04f1281..f70a875 100644
> --- a/drivers/gpu/drm/i915/i915_guc_submission.c
> +++ b/drivers/gpu/drm/i915/i915_guc_submission.c
> @@ -1212,55 +1212,3 @@ void i915_guc_submission_disable(struct drm_i915_private *dev_priv)
> guc_client_free(guc->execbuf_client);
> guc->execbuf_client = NULL;
> }
> -
> -/**
> - * intel_guc_suspend() - notify GuC entering suspend state
> - * @dev_priv: i915 device private
> - */
> -int intel_guc_suspend(struct drm_i915_private *dev_priv)
> -{
> - struct intel_guc *guc = &dev_priv->guc;
> - struct i915_gem_context *ctx;
> - u32 data[3];
> -
> - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
> - return 0;
> -
> - gen9_disable_guc_interrupts(dev_priv);
> -
> - ctx = dev_priv->kernel_context;
> -
> - data[0] = INTEL_GUC_ACTION_ENTER_S_STATE;
> - /* any value greater than GUC_POWER_D0 */
> - data[1] = GUC_POWER_D1;
> - /* first page is shared data with GuC */
> - data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * PAGE_SIZE;
> -
> - return intel_guc_send(guc, data, ARRAY_SIZE(data));
> -}
> -
> -/**
> - * intel_guc_resume() - notify GuC resuming from suspend state
> - * @dev_priv: i915 device private
> - */
> -int intel_guc_resume(struct drm_i915_private *dev_priv)
> -{
> - struct intel_guc *guc = &dev_priv->guc;
> - struct i915_gem_context *ctx;
> - u32 data[3];
> -
> - if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
> - return 0;
> -
> - if (i915_modparams.guc_log_level >= 0)
> - gen9_enable_guc_interrupts(dev_priv);
> -
> - ctx = dev_priv->kernel_context;
> -
> - data[0] = INTEL_GUC_ACTION_EXIT_S_STATE;
> - data[1] = GUC_POWER_D0;
> - /* first page is shared data with GuC */
> - data[2] = guc_ggtt_offset(ctx->engine[RCS].state) + LRC_GUCSHR_PN * PAGE_SIZE;
> -
> - return intel_guc_send(guc, data, ARRAY_SIZE(data));
> -}
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index 91a0e4d..793cf49 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -165,3 +165,57 @@ int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset)
>
> return intel_guc_send(guc, action, ARRAY_SIZE(action));
> }
> +
> +/**
> + * intel_guc_suspend() - notify GuC entering suspend state
> + * @dev_priv: i915 device private
> + */
> +int intel_guc_suspend(struct drm_i915_private *dev_priv)
> +{
> + struct intel_guc *guc = &dev_priv->guc;
> + struct i915_gem_context *ctx;
> + u32 data[3];
> +
> + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
> + return 0;
> +
> + gen9_disable_guc_interrupts(dev_priv);
> +
> + ctx = dev_priv->kernel_context;
> +
> + data[0] = INTEL_GUC_ACTION_ENTER_S_STATE;
> + /* any value greater than GUC_POWER_D0 */
> + data[1] = GUC_POWER_D1;
> + /* first page is shared data with GuC */
> + data[2] = guc_ggtt_offset(ctx->engine[RCS].state) +
> + LRC_GUCSHR_PN * PAGE_SIZE;
> +
> + return intel_guc_send(guc, data, ARRAY_SIZE(data));
> +}
> +
> +/**
> + * intel_guc_resume() - notify GuC resuming from suspend state
> + * @dev_priv: i915 device private
> + */
> +int intel_guc_resume(struct drm_i915_private *dev_priv)
> +{
> + struct intel_guc *guc = &dev_priv->guc;
> + struct i915_gem_context *ctx;
> + u32 data[3];
> +
> + if (guc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
> + return 0;
> +
> + if (i915_modparams.guc_log_level >= 0)
> + gen9_enable_guc_interrupts(dev_priv);
> +
> + ctx = dev_priv->kernel_context;
> +
> + data[0] = INTEL_GUC_ACTION_EXIT_S_STATE;
> + data[1] = GUC_POWER_D0;
> + /* first page is shared data with GuC */
> + data[2] = guc_ggtt_offset(ctx->engine[RCS].state) +
> + LRC_GUCSHR_PN * PAGE_SIZE;
> +
> + return intel_guc_send(guc, data, ARRAY_SIZE(data));
> +}
> diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
> index d508b35..ffedb06 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -149,6 +149,8 @@ int intel_guc_send_nop(struct intel_guc *guc, const u32 *action, u32 len);
> int intel_guc_send_mmio(struct intel_guc *guc, const u32 *action, u32 len);
> int intel_guc_sample_forcewake(struct intel_guc *guc);
> int intel_guc_auth_huc(struct intel_guc *guc, u32 rsa_offset);
> +int intel_guc_suspend(struct drm_i915_private *dev_priv);
> +int intel_guc_resume(struct drm_i915_private *dev_priv);
>
> /* intel_guc_loader.c */
> int intel_guc_select_fw(struct intel_guc *guc);
> @@ -161,8 +163,6 @@ int i915_guc_submission_enable(struct drm_i915_private *dev_priv);
> void i915_guc_submission_disable(struct drm_i915_private *dev_priv);
> void i915_guc_submission_fini(struct drm_i915_private *dev_priv);
> struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size);
> -int intel_guc_suspend(struct drm_i915_private *dev_priv);
> -int intel_guc_resume(struct drm_i915_private *dev_priv);
>
> /* intel_guc_log.c */
> int intel_guc_log_create(struct intel_guc *guc);
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