[Intel-gfx] [PATCH v3 4/4] drm/i915/psr: Timestamps for PSR entry and exit interrupts.

Souza, Jose jose.souza at intel.com
Wed Apr 4 00:56:30 UTC 2018


On Tue, 2018-04-03 at 14:24 -0700, Dhinakaran Pandiyan wrote:
> Timestamps are useful for IGT tests that trigger PSR exit and/or wait
> for
> PSR entry.
> 
> v2: Removed seqlock (Ville)
>     Removed erroneous warning in irq loop (Chris)
> 
> Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>

Reviewed-by: Jose Roberto de Souza <jose.souza at intel.com>

> ---
>  drivers/gpu/drm/i915/i915_debugfs.c | 7 +++++++
>  drivers/gpu/drm/i915/i915_drv.h     | 2 ++
>  drivers/gpu/drm/i915/intel_psr.c    | 9 +++++++--
>  3 files changed, 16 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index 28f91df5b401..b378fa013054 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2686,6 +2686,13 @@ static int i915_edp_psr_status(struct seq_file
> *m, void *data)
>  	}
>  	mutex_unlock(&dev_priv->psr.lock);
>  
> +	if (READ_ONCE(dev_priv->psr.debug)) {
> +		seq_printf(m, "Last attempted entry at: %lld\n",
> +			   dev_priv->psr.last_entry_attempt);
> +		seq_printf(m, "Last exit at: %lld\n",
> +			   dev_priv->psr.last_exit);
> +	}
> +
>  	intel_runtime_pm_put(dev_priv);
>  	return 0;
>  }
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h
> index b97ed0cd4ca9..2124a795d10c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -610,6 +610,8 @@ struct i915_psr {
>  	bool psr2_enabled;
>  	u8 sink_sync_latency;
>  	bool debug;
> +	ktime_t last_entry_attempt;
> +	ktime_t last_exit;
>  
>  	void (*enable_source)(struct intel_dp *,
>  			      const struct intel_crtc_state *);
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 56ff2d7691a1..a11a6d940203 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -131,6 +131,7 @@ void intel_psr_irq_handler(struct
> drm_i915_private *dev_priv, u32 psr_iir)
>  {
>  	u32 transcoders = BIT(TRANSCODER_EDP);
>  	enum transcoder cpu_transcoder;
> +	ktime_t time_ns =  ktime_get();
>  
>  	if (INTEL_GEN(dev_priv) >= 8)
>  		transcoders |= BIT(TRANSCODER_A) |
> @@ -143,13 +144,17 @@ void intel_psr_irq_handler(struct
> drm_i915_private *dev_priv, u32 psr_iir)
>  			DRM_DEBUG_KMS("[transcoder %s] PSR aux
> error\n",
>  				      transcoder_name(cpu_transcoder
> ));
>  
> -		if (psr_iir & EDP_PSR_PRE_ENTRY(cpu_transcoder))
> +		if (psr_iir & EDP_PSR_PRE_ENTRY(cpu_transcoder)) {
> +			dev_priv->psr.last_entry_attempt = time_ns;
>  			DRM_DEBUG_KMS("[transcoder %s] PSR entry
> attempt in 2 vblanks\n",
>  				      transcoder_name(cpu_transcoder
> ));
> +		}
>  
> -		if (psr_iir & EDP_PSR_POST_EXIT(cpu_transcoder))
> +		if (psr_iir & EDP_PSR_POST_EXIT(cpu_transcoder)) {
> +			dev_priv->psr.last_exit = time_ns;
>  			DRM_DEBUG_KMS("[transcoder %s] PSR exit
> completed\n",
>  				      transcoder_name(cpu_transcoder
> ));
> +		}
>  	}
>  }
>  


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