[Intel-gfx] [PATCH] drm/i915/cnp: Properly handle VBT ddc pin out of bounds.
Jani Nikula
jani.nikula at intel.com
Mon Apr 9 09:48:15 UTC 2018
On Fri, 23 Mar 2018, Timo Aaltonen <tjaalton at ubuntu.com> wrote:
> On 30.01.2018 00:12, Rodrigo Vivi wrote:
>> On Mon, Jan 29, 2018 at 05:42:53AM +0000, Kai Heng Feng wrote:
>>>
>>>> On 26 Jan 2018, at 6:25 AM, Rodrigo Vivi <rodrigo.vivi at intel.com> wrote:
>>>>
>>>> If the table result is out of bounds on the array map
>>>> there is something really wrong with VBT pin so we don't
>>>> return that vbt_pin, but only return 0 instead.
>>>>
>>>> This basically reverts commit 'a8e6f3888b05 ("drm/i915/cnp:
>>>> Ignore VBT request for know invalid DDC pin.")'
>>>>
>>>> Also this properly fixes commit 9c3b2689d01f ("drm/i915/cnl:
>>>> Map VBT DDC Pin to BSpec DDC Pin.")
>>>>
>>>> v2: Do in a way that we don't break other platforms. (Jani)
>>>>
>>>> v3: Keep debug message (Jani)
>>>>
>>>> v4: Don't mess with 0 mapping was noticed by Jani and
>>>> addressed with a simple solution suggested by Lucas
>>>> that makes this even simpler.
>>>>
>>>> Fixes: a8e6f3888b05 ("drm/i915/cnp: Ignore VBT request for know invalid DDC pin.")
>>>> Fixes: 9c3b2689d01f ("drm/i915/cnl: Map VBT DDC Pin to BSpec DDC Pin.")
>>>> Cc: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
>>>> Cc: Jani Nikula <jani.nikula at intel.com>
>>>> Cc: Kai Heng Feng <kai.heng.feng at canonical.com>
>>>> Cc: Lucas De Marchi <lucas.demarchi at intel.com>
>>>> Suggested-by: Lucas De Marchi <lucas.demarchi at intel.com>
>>>> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>>>
>>> Tested-by: Kai-Heng Feng <kai.heng.feng at canonical.com>
>>
>> merged. thanks for suggestions, reviews, tests and patience ;)
>
> Shouldn't this and
>
> drm/i915/cnp: Ignore VBT request for know invalid DDC pin.
>
> be cc:stable? Though they aren't even in 4.16 yet.
Apologies for nobody replying. The commits are in v4.16, and I've made a
stable backport request for v4.15.
BR,
Jani.
--
Jani Nikula, Intel Open Source Technology Center
More information about the Intel-gfx
mailing list