[Intel-gfx] [PATCH] drm/i915: Add debugfs file to clear FIFO underruns.

Rodrigo Vivi rodrigo.vivi at intel.com
Mon Apr 9 19:48:20 UTC 2018


On Wed, Mar 28, 2018 at 06:20:26PM +0200, Maarten Lankhorst wrote:
> Op 28-03-18 om 12:21 schreef Jani Nikula:
> > On Wed, 28 Mar 2018, Maarten Lankhorst <maarten.lankhorst at linux.intel.com> wrote:
> >> Adding a i915_fifo_underrun_reset debugfs file will make it possible
> >> for IGT tests to clear FIFO underrun fallout at the start of each
> >> subtest, and make re-enable FBC so tests always have maximum exposure
> >> to features used by IGT. FIFO underruns and FBC bugs will no longer
> >> hide when an earlier subtests disables both.
> >>
> >> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105685
> >> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=105681
> > FWIW, ack on the idea, didn't look at the implementation.
> Well I had a NV12 test that produced FIFO underruns, did some quick testing against the i915_fifo_underrun_reset file and manually writing it does reset FIFO underruns.
> Immediately after i915_fbc_status still reads "FBC disabled: underrun detected", but this is cleared by the next atomic commit. So I think it works, and can be used for igt in the way I wrote it.

What about a error message change on fbc_status to reflect this temporary state?
Just to avoid later confusion on expectation.

But the approach and code look sane for me, so anyways:

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> 
> ~Maarten
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