[Intel-gfx] [PATCH v2 2/6] drm/i915: Add NV12 as supported format for primary plane
Kristian Høgsberg
hoegsberg at gmail.com
Fri Apr 13 16:15:01 UTC 2018
On Fri, Apr 13, 2018 at 5:17 AM Vidya Srinivas <vidya.srinivas at intel.com>
wrote:
> From: Chandra Konduru <chandra.konduru at intel.com>
> This patch adds NV12 to list of supported formats for
> primary plane
Reviewed-by: Kristian H. Kristensen <hoegsberg at google.com>
> v2: Rebased (Chandra Konduru)
> v3: Rebased (me)
> v4: Review comments by Ville addressed
> Removed the skl_primary_formats_with_nv12 and
> added NV12 case in existing skl_primary_formats
> v5: Rebased (me)
> v6: Missed the Tested-by/Reviewed-by in the previous series
> Adding the same to commit message in this version.
> v7: Review comments by Ville addressed
> Restricting the NV12 for BXT and on PIPE A and B
> Rebased (me)
> v8: Rebased (me)
> Modified restricting the NV12 support for both BXT and KBL.
> v9: Rebased (me)
> v10: Addressed review comments from Maarten.
> Adding NV12 inside skl_primary_formats itself.
> v11: Adding Reviewed By tag from Shashank Sharma
> v12: Addressed review comments from Juha-Pekka Heikkila
> "NV12 not to be supported by SKL"
> v13: Addressed review comments from Ville
> Added skl_pri_planar_formats to include NV12
> and skl_plane_has_planar function to check for
> NV12 support on plane. Added NV12 format to
> skl_mod_supported. These were review comments
> from Kristian Høgsberg <hoegsberg at gmail.com>
> v14: Added reviewed by from Juha-Pekka Heikkila
> v15: Rebased the series
> v16: Added all tiling support under mod supported
> for NV12. Credits to Megha Aggarwal
> Credits-to: Megha Aggarwal megha.aggarwal at intel.com
> Tested-by: Clinton Taylor <clinton.a.taylor at intel.com>
> Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila at gmail.com>
> Reviewed-by: Clinton Taylor <clinton.a.taylor at intel.com>
> Reviewed-by: Shashank Sharma <shashank.sharma at intel.com>
> Signed-off-by: Chandra Konduru <chandra.konduru at intel.com>
> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti at intel.com>
> Signed-off-by: Vidya Srinivas <vidya.srinivas at intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 55
++++++++++++++++++++++++++++++++++--
> drivers/gpu/drm/i915/intel_drv.h | 2 ++
> 2 files changed, 55 insertions(+), 2 deletions(-)
> diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
> index 22c8a7d..1a0fae9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -88,6 +88,22 @@ static const uint32_t skl_primary_formats[] = {
> DRM_FORMAT_VYUY,
> };
> +static const uint32_t skl_pri_planar_formats[] = {
> + DRM_FORMAT_C8,
> + DRM_FORMAT_RGB565,
> + DRM_FORMAT_XRGB8888,
> + DRM_FORMAT_XBGR8888,
> + DRM_FORMAT_ARGB8888,
> + DRM_FORMAT_ABGR8888,
> + DRM_FORMAT_XRGB2101010,
> + DRM_FORMAT_XBGR2101010,
> + DRM_FORMAT_YUYV,
> + DRM_FORMAT_YVYU,
> + DRM_FORMAT_UYVY,
> + DRM_FORMAT_VYUY,
> + DRM_FORMAT_NV12,
> +};
> +
> static const uint64_t skl_format_modifiers_noccs[] = {
> I915_FORMAT_MOD_Yf_TILED,
> I915_FORMAT_MOD_Y_TILED,
> @@ -13124,6 +13140,12 @@ static bool skl_mod_supported(uint32_t format,
uint64_t modifier)
> if (modifier == I915_FORMAT_MOD_Yf_TILED)
> return true;
> /* fall through */
> + case DRM_FORMAT_NV12:
> + if (modifier == DRM_FORMAT_MOD_LINEAR ||
> + modifier == I915_FORMAT_MOD_X_TILED ||
> + modifier == I915_FORMAT_MOD_Y_TILED ||
> + modifier == I915_FORMAT_MOD_Yf_TILED)
> + return true;
> case DRM_FORMAT_C8:
> if (modifier == DRM_FORMAT_MOD_LINEAR ||
> modifier == I915_FORMAT_MOD_X_TILED ||
> @@ -13328,6 +13350,30 @@ static bool skl_plane_has_fbc(struct
drm_i915_private *dev_priv,
> return pipe == PIPE_A && plane_id == PLANE_PRIMARY;
> }
> +bool skl_plane_has_planar(struct drm_i915_private *dev_priv,
> + enum pipe pipe, enum plane_id plane_id)
> +{
> + if (plane_id == PLANE_PRIMARY) {
> + if (IS_SKYLAKE(dev_priv))
> + return false;
> + else if ((INTEL_GEN(dev_priv) == 9 && pipe == PIPE_C) &&
> + !IS_GEMINILAKE(dev_priv))
> + return false;
> + } else if (plane_id >= PLANE_SPRITE0) {
> + if (plane_id == PLANE_CURSOR)
> + return false;
> + if (IS_GEMINILAKE(dev_priv) || INTEL_GEN(dev_priv) == 10)
{
> + if (plane_id != PLANE_SPRITE0)
> + return false;
> + } else {
> + if (plane_id != PLANE_SPRITE0 || pipe == PIPE_C ||
> + IS_SKYLAKE(dev_priv))
> + return false;
> + }
> + }
> + return true;
> +}
> +
> static struct intel_plane *
> intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe
pipe)
> {
> @@ -13388,8 +13434,13 @@ intel_primary_plane_create(struct
drm_i915_private *dev_priv, enum pipe pipe)
> primary->check_plane = intel_check_primary_plane;
> if (INTEL_GEN(dev_priv) >= 9) {
> - intel_primary_formats = skl_primary_formats;
> - num_formats = ARRAY_SIZE(skl_primary_formats);
> + if (skl_plane_has_planar(dev_priv, pipe, PLANE_PRIMARY)) {
> + intel_primary_formats = skl_pri_planar_formats;
> + num_formats = ARRAY_SIZE(skl_pri_planar_formats);
> + } else {
> + intel_primary_formats = skl_primary_formats;
> + num_formats = ARRAY_SIZE(skl_primary_formats);
> + }
> if (skl_plane_has_ccs(dev_priv, pipe, PLANE_PRIMARY))
> modifiers = skl_format_modifiers_ccs;
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
b/drivers/gpu/drm/i915/intel_drv.h
> index d8930676..01352ef 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -2063,6 +2063,8 @@ bool skl_plane_get_hw_state(struct intel_plane
*plane);
> bool skl_plane_has_ccs(struct drm_i915_private *dev_priv,
> enum pipe pipe, enum plane_id plane_id);
> bool intel_format_is_yuv(uint32_t format);
> +bool skl_plane_has_planar(struct drm_i915_private *dev_priv,
> + enum pipe pipe, enum plane_id plane_id);
> /* intel_tv.c */
> void intel_tv_init(struct drm_i915_private *dev_priv);
> --
> 2.7.4
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