[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/9] drm/i915/psr: Move specific HSW+ WARN_ON to HSW+ function

[Patchwork]

== Series Details ==

Series: series starting with [v2,1/9] drm/i915/psr: Move specific HSW+ WARN_ON to HSW+ function
URL   : https://patchwork.freedesktop.org/series/41923/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
9dc8e92b44ac drm/i915/psr: Move specific HSW+ WARN_ON to HSW+ function
f0dbcd5555f6 drm/i915/psr: Move PSR exit specific code to hardware specific function
0a466f97bd5a drm/i915/psr: Remove intel_crtc_state parameter from disable()
440ab6965b08 drm/i915/psr: Begin to handle PSR/PSR2 errors set by sink
-:54: CHECK:LOGICAL_CONTINUATIONS: Logical continuations should be on the previous line
#54: FILE: drivers/gpu/drm/i915/intel_psr.c:1002:
+	if (dev_priv->psr.active || dev_priv->psr.busy_frontbuffer_bits
+	    || work_busy(&dev_priv->psr.work.work))

total: 0 errors, 0 warnings, 1 checks, 78 lines checked
e463ec258771 drm/i915/psr: Handle PSR RFB storage error
16a97441a986 drm/i915/psr/bdw+: Enable CRC check in the static frame on the sink side
-:32: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#32: FILE: drivers/gpu/drm/i915/i915_reg.h:4019:
+#define   EDP_PSR_CRC_ENABLE			(1<<10) /* BDW+ */
                             			  ^

total: 0 errors, 0 warnings, 1 checks, 60 lines checked
5a9cc41f7e89 drm/i915/dp: Move code to check if aux ch is busy to a function
-:41: WARNING:MSLEEP: msleep < 20ms can sleep for up to 20ms; see Documentation/timers/timers-howto.txt
#41: FILE: drivers/gpu/drm/i915/intel_dp.c:1080:
+		msleep(1);

total: 0 errors, 1 warnings, 0 checks, 70 lines checked
87008545c0f1 drm/i915/dp: Improve intel_dp_aux_is_busy()
524271645ddc drm/i915/dp: Avoid concurrent access when HW is using aux ch