[Intel-gfx] [PATCH 03/22] drm/i915/icl: WaGAPZPriorityScheme

[Mika Kuoppala]

Oscar Mateo <oscar.mateo at intel.com> writes:

> The default GAPZ arbitrer priority value at power-on has been found
> to be incorrect.
>
> v2: Now renamed to Wa_1405543622
>
> v3: Rebased on top of the WA refactoring
>

I have suggested that when implementing workarounds,
authors, for example, add

References: HSDES#1405542622, HSDES#1207131207

as a first tagline to ease up the review.
I do that again :) No need to resend,

Reviewed-by: Mika Kuoppala <mika.kuoppala at linux.intel.com>

> Cc: Mika Kuoppala <mika.kuoppala at linux.intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h          | 5 +++--
>  drivers/gpu/drm/i915/intel_workarounds.c | 6 ++++++
>  2 files changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 4b7e6bc..a6b1f85 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8215,8 +8215,9 @@ enum {
>  #define   GEN8_DOP_CLOCK_GATE_GUC_ENABLE	(1<<4)
>  #define   GEN8_DOP_CLOCK_GATE_MEDIA_ENABLE     (1<<6)
>  
> -#define GEN8_GARBCNTL                   _MMIO(0xB004)
> -#define   GEN9_GAPS_TSV_CREDIT_DISABLE  (1<<7)
> +#define GEN8_GARBCNTL				_MMIO(0xB004)
> +#define   GEN9_GAPS_TSV_CREDIT_DISABLE		(1 << 7)
> +#define   GEN11_ARBITRATION_PRIO_ORDER_MASK	(0x3f << 22)
>  
>  #define GEN10_DFR_RATIO_EN_AND_CHICKEN	_MMIO(0x9550)
>  #define   DFR_DISABLE			(1 << 9)
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c b/drivers/gpu/drm/i915/intel_workarounds.c
> index 60a5b1d..ffd27a1 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -703,6 +703,12 @@ static void icl_gt_workarounds_apply(struct drm_i915_private *dev_priv)
>  	/* WaPipelineFlushCoherentLines:icl */
>  	I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
>  				    GEN8_LQSC_FLUSH_COHERENT_LINES));
> +
> +	/* Wa_1405543622:icl
> +	 * Formerly known as WaGAPZPriorityScheme
> +	 */
> +	I915_WRITE(GEN8_GARBCNTL, (I915_READ(GEN8_GARBCNTL) |
> +				   GEN11_ARBITRATION_PRIO_ORDER_MASK));
>  }
>  
>  void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
> -- 
> 1.9.1