[Intel-gfx] [PATCH] firmware/dmc/icl: load v1.07 on icelake.

[Yadav, Jyoti R]

Hi Anusha,

I think we should also add "HAS_CSR" capability, which is being 
exercised inside intel_csr_ucode_init() path.

For ICL, inside intel_device_info structure we should add has_csr = 1, 
otherwise below check will fail and function will return from there itself.

if (!HAS_CSR(dev_priv))
                 return;

Regards
Jyoti
On 8/2/2018 10:41 AM, Rodrigo Vivi wrote:
> On Wed, Aug 01, 2018 at 05:30:49PM -0700, Paulo Zanoni wrote:
>> Em Qua, 2018-08-01 às 17:07 -0700, Anusha Srivatsa escreveu:
>>> Add Support to load DMC on Icelake.
>>>
>>> While at it, also add support to load the firmware
>>> during system resume.
>>>
>>> v2: load firmware during system resume.(Imre)
>> Just to make it clear: did we test this on actual machines before
>> submitting or are we entirely relying on the CI results?
>>
>> I'm not sure the CI is running enough tests to validate this patch with
>> confidence, we'll probably need to do some manual testing here.
> At some point I believe it was agreed that CI would test this
> and get the new firmware automatically from the cover-letter.
>
> The problem is that I don't see any cover-letter so I'm afraid
> it is not running with the new firmware.
>
> Tomi?
>
> Also I believe in case it has the cover letter it should run
> the full CI on the machine or at least stash it and run on
> the weekend or whenever we run the full on all machines and
> then report back again. Possible?
>
> Martin?
>
>>> Cc: Imre Deak <imre.deak at intel.com>
>>> Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
>>> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
>>> Signed-off-by: Anusha Srivatsa <anusha.srivatsa at intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_csr.c        | 7 +++++++
>>>   drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +++
>>>   2 files changed, 10 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_csr.c
>>> b/drivers/gpu/drm/i915/intel_csr.c
>>> index cf9b600..393d419 100644
>>> --- a/drivers/gpu/drm/i915/intel_csr.c
>>> +++ b/drivers/gpu/drm/i915/intel_csr.c
>>> @@ -34,6 +34,9 @@
>>>    * low-power state and comes back to normal.
>>>    */
>>>   
>>> +#define I915_CSR_ICL "i915/icl_dmc_ver1_07.bin"
>>> +#define ICL_CSR_VERSION_REQUIRED	CSR_VERSION(1, 7)
>>> +
>>>   #define I915_CSR_GLK "i915/glk_dmc_ver1_04.bin"
>>>   MODULE_FIRMWARE(I915_CSR_GLK);
>>>   #define GLK_CSR_VERSION_REQUIRED	CSR_VERSION(1, 4)
>>> @@ -301,6 +304,8 @@ static uint32_t *parse_csr_fw(struct
>>> drm_i915_private *dev_priv,
>>>   	if (csr->fw_path == i915_modparams.dmc_firmware_path) {
>>>   		/* Bypass version check for firmware override. */
>>>   		required_version = csr->version;
>>> +	} else if (IS_ICELAKE(dev_priv)) {
>>> +		required_version = ICL_CSR_VERSION_REQUIRED;
>>>   	} else if (IS_CANNONLAKE(dev_priv)) {
>>>   		required_version = CNL_CSR_VERSION_REQUIRED;
>>>   	} else if (IS_GEMINILAKE(dev_priv)) {
>>> @@ -458,6 +463,8 @@ void intel_csr_ucode_init(struct drm_i915_private
>>> *dev_priv)
>>>   
>>>   	if (i915_modparams.dmc_firmware_path)
>>>   		csr->fw_path = i915_modparams.dmc_firmware_path;
>>> +	else if (IS_ICELAKE(dev_priv))
>>> +		csr->fw_path = I915_CSR_ICL;
>>>   	else if (IS_CANNONLAKE(dev_priv))
>>>   		csr->fw_path = I915_CSR_CNL;
>>>   	else if (IS_GEMINILAKE(dev_priv))
>>> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> b/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> index cf89141..77c0986 100644
>>> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
>>> @@ -3372,6 +3372,9 @@ static void icl_display_core_init(struct
>>> drm_i915_private *dev_priv,
>>>   
>>>   	/* 7. Setup MBUS. */
>>>   	icl_mbus_init(dev_priv);
>>> +
>>> +	if (resume && dev_priv->csr.dmc_payload)
>>> +		intel_csr_load_program(dev_priv);
>>>   }
>>>   
>>>   static void icl_display_core_uninit(struct drm_i915_private
>>> *dev_priv)
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