[Intel-gfx] [PATCH 01/10] drm/i915/icl: Fix power well anonymous union initializers

[Imre Deak]

On Thu, Aug 02, 2018 at 05:24:36PM -0700, Paulo Zanoni wrote:
> Em Qui, 2018-08-02 às 16:17 -0700, Lucas De Marchi escreveu:
> > On Fri, Jul 20, 2018 at 05:14:55PM +0300, Imre Deak wrote:
> > > Similarly to
> > > 0a445945be6d ("drm/i915: Work around GCC anonymous union
> > > initialization bug")
> > > we need to initialize anonymous unions inside extra braces to work
> > > around a GCC4.4 build error.
> > 
> > Aren't we jumping to gcc 4.5 as minimum version? Or was it 4.6/4.8?
> 
> https://cgit.freedesktop.org/drm-tip/tree/Documentation/process/changes.rst#n32
> 
> 3.2 is still the theoretical minimum for us.

There do seems to be a plan [1] to make the minimum 4.8. But yea, that's
still just a plan. In any case I'd use one form of initialization for
consistency, now it's both ways in the code.

[1] https://www.linuxjournal.com/content/minimum-gcc-version-likely-jump-32-48

> 
> > 
> > Lucas De Marchi
> > 
> > > 
> > > Cc: Chris Wilson <chris at chris-wilson.co.uk>
> > > Cc: Ville Syrjala <ville.syrjala at linux.intel.com>
> > > Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> > > Cc: Jani Nikula <jani.nikula at intel.com>
> > > Signed-off-by: Imre Deak <imre.deak at intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/intel_runtime_pm.c | 22 +++++++++++++++----
> > > ---
> > >  1 file changed, 15 insertions(+), 7 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > index 6b5aa3b074ec..1a87176a85c1 100644
> > > --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> > > @@ -2620,14 +2620,18 @@ static struct i915_power_well
> > > icl_power_wells[] = {
> > >  		.domains = 0,
> > >  		.ops = &hsw_power_well_ops,
> > >  		.id = ICL_DISP_PW_1,
> > > -		.hsw.has_fuses = true,
> > > +		{
> > > +			.hsw.has_fuses = true,
> > > +		},
> > >  	},
> > >  	{
> > >  		.name = "power well 2",
> > >  		.domains = ICL_PW_2_POWER_DOMAINS,
> > >  		.ops = &hsw_power_well_ops,
> > >  		.id = ICL_DISP_PW_2,
> > > -		.hsw.has_fuses = true,
> > > +		{
> > > +			.hsw.has_fuses = true,
> > > +		},
> > >  	},
> > >  	{
> > >  		.name = "DC off",
> > > @@ -2640,9 +2644,11 @@ static struct i915_power_well
> > > icl_power_wells[] = {
> > >  		.domains = ICL_PW_3_POWER_DOMAINS,
> > >  		.ops = &hsw_power_well_ops,
> > >  		.id = ICL_DISP_PW_3,
> > > -		.hsw.irq_pipe_mask = BIT(PIPE_B),
> > > -		.hsw.has_vga = true,
> > > -		.hsw.has_fuses = true,
> > > +		{
> > > +			.hsw.irq_pipe_mask = BIT(PIPE_B),
> > > +			.hsw.has_vga = true,
> > > +			.hsw.has_fuses = true,
> > > +		},
> > >  	},
> > >  	{
> > >  		.name = "DDI A IO",
> > > @@ -2745,8 +2751,10 @@ static struct i915_power_well
> > > icl_power_wells[] = {
> > >  		.domains = ICL_PW_4_POWER_DOMAINS,
> > >  		.ops = &hsw_power_well_ops,
> > >  		.id = ICL_DISP_PW_4,
> > > -		.hsw.has_fuses = true,
> > > -		.hsw.irq_pipe_mask = BIT(PIPE_C),
> > > +		{
> > > +			.hsw.has_fuses = true,
> > > +			.hsw.irq_pipe_mask = BIT(PIPE_C),
> > > +		},
> > >  	},
> > >  };
> > >  
> > > -- 
> > > 2.13.2
> > > 
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