[Intel-gfx] [PATCH] drm/i915/selftests: Unconditionally do a chipset flush before emit_bb_start

[Matthew Auld]

On 6 August 2018 at 15:46, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> Experience teaches us over and over again that coherency on Baytrail
> requires the odd heavy hammer, and in particular clflush alone is not
> enough to guarrantee that writes from the CPU are picked up by the CS.
> Do as we do elsewhere and ensure we have an unconditional
> i915_gem_chipset_flush() after writing to memory and submitting a batch
> to HW.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107499
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld at intel.com>