[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Display Stream Compression enabling on eDP/DP (rev3)

Patchwork patchwork at emeril.freedesktop.org
Mon Aug 6 20:15:33 UTC 2018 

== Series Details ==

Series: Display Stream Compression enabling on eDP/DP (rev3)
URL   : https://patchwork.freedesktop.org/series/47514/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
260bd82c6e63 drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT
ad45004f3beb drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init
3f4cbb06f531 drm/dp: DRM DP helper/macros to get DP sink DSC parameters
84cd213b3601 drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC
-:24: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#24: 
* rename it as SMALL_JOINER since we are not enabling big joiner yet (Anusha)

total: 0 errors, 1 warnings, 0 checks, 132 lines checked
094f8213eaf6 drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported
5024c746bceb drm/dp: Define payload size for DP SDP PPS packet
8cd06876e63d drm/dsc: Define Display Stream Compression PPS infoframe
-:21: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#21: 
new file mode 100644

-:26: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#26: FILE: include/drm/drm_dsc.h:1:
+/*

total: 0 errors, 2 warnings, 0 checks, 365 lines checked
08a99be4a6e7 drm/dsc: Define VESA Display Stream Compression Capabilities
3382d55c3c90 drm/dsc: Define Rate Control values that do not change over configurations
bdb5662452d7 drm/dsc: Add helpers for DSC picture parameter set infoframes
-:19: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#19: 
* Add reference to added kernel-docs in Documentation/gpu/drm-kms-helpers.rst

-:69: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#69: 
new file mode 100644

-:74: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#74: FILE: drivers/gpu/drm/drm_dsc.c:1:
+/*

-:210: WARNING:LONG_LINE: line over 100 characters
#210: FILE: drivers/gpu/drm/drm_dsc.c:137:
+	pps_sdp->pps_payload.scale_increment_interval = cpu_to_be16(dsc_cfg->scale_increment_interval);

-:213: WARNING:LONG_LINE: line over 100 characters
#213: FILE: drivers/gpu/drm/drm_dsc.c:140:
+	pps_sdp->pps_payload.scale_decrement_interval_high = (u8)((dsc_cfg->scale_decrement_interval &

-:214: WARNING:LONG_LINE: line over 100 characters
#214: FILE: drivers/gpu/drm/drm_dsc.c:141:
+								   DSC_PPS_SCALE_DEC_INT_HIGH_MASK) >>

-:276: WARNING:LONG_LINE: line over 100 characters
#276: FILE: drivers/gpu/drm/drm_dsc.c:203:
+		pps_sdp->pps_payload.rc_range_parameters[i] = cpu_to_be16(pps_sdp->pps_payload.rc_range_parameters[i]);

total: 0 errors, 7 warnings, 0 checks, 285 lines checked
91f41efbc087 drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
b86b83d10bfc drm/i915/dp: Compute DSC pipe config in atomic check
-:183: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#183: FILE: drivers/gpu/drm/i915/intel_dp.c:2016:
+	} else {
+

total: 0 errors, 0 warnings, 1 checks, 256 lines checked
e899b233c01b drm/i915/dp: Do not enable PSR2 if DSC is enabled
882650dcfe2e drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
f53b12e6c243 drm/i915/dsc: Define & Compute VESA DSC params
-:83: WARNING:MISSING_SPACE: break quoted strings at a space character
#83: FILE: drivers/gpu/drm/i915/intel_dp.c:2047:
+		DRM_ERROR("Cannot compute valid DSC parameters for Input Bpp = %d"
+			  "Compressed BPP = %d\n",

-:107: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#107: 
new file mode 100644

-:112: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#112: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1:
+/*

-:411: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#411: FILE: drivers/gpu/drm/i915/intel_vdsc.c:300:
+}
+};

-:450: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#450: FILE: drivers/gpu/drm/i915/intel_vdsc.c:339:
+int intel_dp_compute_dsc_params(struct intel_dp *intel_dp,
+					struct intel_crtc_state *pipe_config)

total: 0 errors, 3 warnings, 2 checks, 504 lines checked
1dcccc9d47d4 drm/i915/dsc: Compute Rate Control parameters for DSC
-:136: CHECK:SPACING: space preferred before that '*' (ctx:VxE)
#136: FILE: drivers/gpu/drm/i915/intel_vdsc.c:431:
+				vdsc_cfg->slice_bpg_offset)*
 				                           ^

-:168: CHECK:LINE_SPACING: Please don't use multiple blank lines
#168: FILE: drivers/gpu/drm/i915/intel_vdsc.c:463:
+
+

total: 0 errors, 0 warnings, 2 checks, 140 lines checked
8a45c3bd9e1f drm/i915/dp: Enable/Disable DSC in DP Sink
e6b09134e9a9 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
-:34: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#34: FILE: drivers/gpu/drm/i915/i915_drv.h:3434:
+extern void intel_dsc_enable(struct intel_encoder *encoder,

-:322: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#322: FILE: drivers/gpu/drm/i915/intel_vdsc.c:843:
+		rc_buf_thresh_dword[i/4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] <<
 		                     ^

-:323: CHECK:SPACING: spaces preferred around that '%' (ctx:VxV)
#323: FILE: drivers/gpu/drm/i915/intel_vdsc.c:844:
+						  BITS_PER_BYTE * (i%4));
 						                    ^

-:325: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#325: FILE: drivers/gpu/drm/i915/intel_vdsc.c:846:
+			 rc_buf_thresh_dword[i/4]);
 			                      ^

-:366: WARNING:LONG_LINE: line over 100 characters
#366: FILE: drivers/gpu/drm/i915/intel_vdsc.c:887:
+		rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<

-:366: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#366: FILE: drivers/gpu/drm/i915/intel_vdsc.c:887:
+		rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<
 		                       ^

-:371: CHECK:SPACING: spaces preferred around that '%' (ctx:VxV)
#371: FILE: drivers/gpu/drm/i915/intel_vdsc.c:892:
+						      RC_MIN_QP_SHIFT)) << 16 * (i%2));
 						                                  ^

-:373: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#373: FILE: drivers/gpu/drm/i915/intel_vdsc.c:894:
+			 rc_range_params_dword[i/2]);
 			                        ^

-:486: WARNING:RETURN_VOID: void function return statements are not generally useful
#486: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1007:
+	return;
+}

total: 0 errors, 2 warnings, 7 checks, 446 lines checked
fc37151a8ea1 drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
51deacd428b9 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
80b74dc61b97 drm/i915/icl: Add Display Stream Splitter control registers
d8c7d9d3b120 drm/i915/dp: Configure Display stream splitter registers during DSC enable
d910d245a98c drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
-:37: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#37: FILE: drivers/gpu/drm/i915/i915_drv.h:3436:
+extern void intel_dsc_disable(struct intel_encoder *encoder,

total: 0 errors, 0 warnings, 1 checks, 74 lines checked

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