[Intel-gfx] [PATCH v2 09/10] drm/i915: Use existing power well IDs where possible

[Paulo Zanoni]

Em Seg, 2018-08-06 às 12:58 +0300, Imre Deak escreveu:
> There is no need for separate IDs for power wells on a new platform
> with
> the same functionality as an other power well on a previous platform,
> we
> can just reuse the ID from the previous platform. This is only
> possible
> after the previous patches where we removed dependence on the actual
> enum values.
> 
> v2:
> - Keep an ID assigned for the ICL PW#2 power well too. (Paulo)

A brief mention in the commit message that this actually fixes a bug on
ICL may be good.

Reviewed-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

> 
> Cc: Ville Syrjala <ville.syrjala at linux.intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
> Cc: Jani Nikula <jani.nikula at intel.com>
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h         |  3 ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 14 +++++++-------
>  2 files changed, 7 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h
> b/drivers/gpu/drm/i915/i915_reg.h
> index ef1fa5054e88..77b031874ee3 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1045,9 +1045,6 @@ enum i915_power_well_id {
>  	SKL_DISP_PW_MISC_IO,
>  	SKL_DISP_PW_1,
>  	SKL_DISP_PW_2,
> -	BXT_DPIO_CMN_BC,
> -	ICL_DISP_PW_1,
> -	ICL_DISP_PW_2,
>  };
>  
>  #define PUNIT_REG_PWRGT_CTRL			0x60
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
> b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index ae08f7824204..810695a71cc8 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -772,7 +772,7 @@ static void bxt_verify_ddi_phy_power_wells(struct
> drm_i915_private *dev_priv)
>  	if (power_well->count > 0)
>  		bxt_ddi_phy_verify_state(dev_priv, power_well->desc-
> >bxt.phy);
>  
> -	power_well = lookup_power_well(dev_priv, BXT_DPIO_CMN_BC);
> +	power_well = lookup_power_well(dev_priv,
> VLV_DISP_PW_DPIO_CMN_BC);
>  	if (power_well->count > 0)
>  		bxt_ddi_phy_verify_state(dev_priv, power_well->desc-
> >bxt.phy);
>  
> @@ -2457,7 +2457,7 @@ static const struct i915_power_well_desc
> bxt_power_wells[] = {
>  		.name = "dpio-common-bc",
>  		.domains = BXT_DPIO_CMN_BC_POWER_DOMAINS,
>  		.ops = &bxt_dpio_cmn_power_well_ops,
> -		.id = BXT_DPIO_CMN_BC,
> +		.id = VLV_DISP_PW_DPIO_CMN_BC,
>  		{
>  			.bxt.phy = DPIO_PHY0,
>  		},
> @@ -2516,7 +2516,7 @@ static const struct i915_power_well_desc
> glk_power_wells[] = {
>  		.name = "dpio-common-b",
>  		.domains = GLK_DPIO_CMN_B_POWER_DOMAINS,
>  		.ops = &bxt_dpio_cmn_power_well_ops,
> -		.id = BXT_DPIO_CMN_BC,
> +		.id = VLV_DISP_PW_DPIO_CMN_BC,
>  		{
>  			.bxt.phy = DPIO_PHY0,
>  		},
> @@ -2765,7 +2765,7 @@ static const struct i915_power_well_desc
> icl_power_wells[] = {
>  		/* Handled by the DMC firmware */
>  		.domains = 0,
>  		.ops = &hsw_power_well_ops,
> -		.id = ICL_DISP_PW_1,
> +		.id = SKL_DISP_PW_1,
>  		{
>  			.hsw.regs = &hsw_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_PW_1,
> @@ -2776,7 +2776,7 @@ static const struct i915_power_well_desc
> icl_power_wells[] = {
>  		.name = "power well 2",
>  		.domains = ICL_PW_2_POWER_DOMAINS,
>  		.ops = &hsw_power_well_ops,
> -		.id = ICL_DISP_PW_2,
> +		.id = SKL_DISP_PW_2,
>  		{
>  			.hsw.regs = &hsw_power_well_regs,
>  			.hsw.idx = ICL_PW_CTL_IDX_PW_2,
> @@ -3575,7 +3575,7 @@ static void icl_display_core_init(struct
> drm_i915_private *dev_priv,
>  	 *    The AUX IO power wells will be enabled on demand.
>  	 */
>  	mutex_lock(&power_domains->lock);
> -	well = lookup_power_well(dev_priv, ICL_DISP_PW_1);
> +	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
>  	intel_power_well_enable(dev_priv, well);
>  	mutex_unlock(&power_domains->lock);
>  
> @@ -3612,7 +3612,7 @@ static void icl_display_core_uninit(struct
> drm_i915_private *dev_priv)
>  	 *    disabled at this point.
>  	 */
>  	mutex_lock(&power_domains->lock);
> -	well = lookup_power_well(dev_priv, ICL_DISP_PW_1);
> +	well = lookup_power_well(dev_priv, SKL_DISP_PW_1);
>  	intel_power_well_disable(dev_priv, well);
>  	mutex_unlock(&power_domains->lock);
>