[Intel-gfx] [PATCH 5/5] drm/i915: use the SW-based pw->hw_enabled check instead of reading registers

[Paulo Zanoni]

I can't find a reason why we would want to call is_enabled(), which
does a register read, instead of just relying on our tracking with
hw_enabled. Let's try to trust our hardware sync.

Cc: Imre Deak <imre.deak at intel.com>
Requested-by: José Roberto de Souza <jose.souza at intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index f38a049861e6..76bb2e06fef1 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -670,9 +670,8 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv)
 {
 	struct i915_power_well *pg2 = lookup_power_well(dev_priv,
 							SKL_DISP_PW_2);
-	bool pg2_enabled = pg2->desc->ops->is_enabled(dev_priv, pg2);
 
-	WARN_ONCE(pg2_enabled, "PG2 not disabled to enable DC5.\n");
+	WARN_ONCE(pg2->hw_enabled, "PG2 not disabled to enable DC5.\n");
 
 	WARN_ONCE((I915_READ(DC_STATE_EN) & DC_STATE_EN_UPTO_DC5),
 		  "DC5 already programmed to be enabled.\n");
-- 
2.14.4