[Intel-gfx] [PATCH v4] drm/i915/psr: Add PSR mode/revision to debugfs

Azhar Shaikh azhar.shaikh at intel.com
Wed Aug 22 17:23:48 UTC 2018


Log the PSR mode/revision (PSR1 or PSR2) in the debugfs file
i915_edp_psr_status.

Suggested-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
Signed-off-by: Azhar Shaikh <azhar.shaikh at intel.com>
---
Changes in v4:
- Fix the rebase error in v3 of adding typecast to bool
- in i915_edp_psr_status(), which is not needed

Changes in v3:
- rebased

Changes in v2:
- Fix checkpatch warning.
- Add Reviewed-by: from v1

 drivers/gpu/drm/i915/i915_debugfs.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 26b7e5276b15..544ec5cdfe9f 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2708,6 +2708,8 @@ static int i915_edp_psr_status(struct seq_file *m, void *data)
 	intel_runtime_pm_get(dev_priv);
 
 	mutex_lock(&dev_priv->psr.lock);
+	seq_printf(m, "PSR mode: %s\n",
+		   dev_priv->psr.psr2_enabled ? "PSR2" : "PSR1");
 	seq_printf(m, "Enabled: %s\n", yesno(dev_priv->psr.enabled));
 	seq_printf(m, "Busy frontbuffer bits: 0x%03x\n",
 		   dev_priv->psr.busy_frontbuffer_bits);
-- 
1.9.1



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