[Intel-gfx] [PATCH v3 2/2] drm/i915: Allow "max bpc" property to limit pipe_bpp

[Radhakrishna Sripada]

From: "Sripada, Radhakrishna" <radhakrishna.sripada at intel.com>

Use the newly added "max bpc" connector property to limit pipe bpp.

V3: Use drm_connector_state to access the "max bpc" property

Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
Cc: Kishore Kadiyala <kishore.kadiyala at intel.com>
Cc: Manasi Navare <manasi.d.navare at intel.com>
Cc: Stanislav Lisovskiy <stanislav.lisovskiy at intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada at intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 30fdfd1a3037..8506cd1634fb 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10784,6 +10784,28 @@ connected_sink_compute_bpp(struct intel_connector *connector,
 	}
 }
 
+static void
+connected_sink_max_bpp(struct drm_connector_state *conn_state,
+			     struct intel_crtc_state *pipe_config)
+{
+	switch (conn_state->max_bpc) {
+	case 8:
+	case 9:
+		pipe_config->pipe_bpp = 8*3;
+		break;
+	case 10:
+	case 11:
+		pipe_config->pipe_bpp = 10*3;
+		break;
+	case 12:
+		pipe_config->pipe_bpp = 12*3;
+		break;
+	default:
+		break;
+	}
+	DRM_DEBUG_KMS("Limiting display bpp to %d\n", pipe_config->pipe_bpp);
+}
+
 static int
 compute_baseline_pipe_bpp(struct intel_crtc *crtc,
 			  struct intel_crtc_state *pipe_config)
@@ -10812,6 +10834,9 @@ compute_baseline_pipe_bpp(struct intel_crtc *crtc,
 		if (connector_state->crtc != &crtc->base)
 			continue;
 
+		if (connector_state->max_bpc)
+			connected_sink_max_bpp(connector_state, pipe_config);
+
 		connected_sink_compute_bpp(to_intel_connector(connector),
 					   pipe_config);
 	}
-- 
2.9.3