[Intel-gfx] [PATCH 00/21] New GuC ABI
Michal Wajdeczko
michal.wajdeczko at intel.com
Wed Aug 29 19:10:34 UTC 2018
This series introduces new Gen11 GuC ABI. Unfortunatelly
this new ABI is not backward compatible, so for a while we
will only support HuC authentication for pre-Gen11 GuC until
new firmwares will be released.
Note: To pass CI.BAT on machines with GuC, HAX will modify
forced modparam to disable GuC submission on those machines.
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
Cc: Michel Thierry <michel.thierry at intel.com>
Cc: John Spotswood <john.a.spotswood at intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
Cc: Tony Ye <tony.ye at intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
Cc: Jeff Mcgee <jeff.mcgee at intel.com>
Cc: Antonio Argenziano <antonio.argenziano at intel.com>
Cc: Sujaritha Sundaresan <sujaritha.sundaresan at intel.com>
Michal Wajdeczko (21):
drm/i915/guc: Update GuC power domain states
drm/i915/guc: Don't allow GuC submission on pre-Gen11
drm/i915/guc: Simplify preparation of GuC parameter block
drm/i915/guc: Support dual Gen9/Gen11 parameters block
drm/i915/guc: Update sample-forcewake command
drm/i915/guc: Use guc_class instead of engine_class in fw interface
drm/i915/guc: New GuC ADS object definition
drm/i915/guc: Make use of the SW counter field in the context
descriptor
drm/i915/guc: New GuC IDs based on engine class and instance
drm/i915: Add hooks for (per-engine) context allocation/update/free
drm/i915/guc: New GuC stage descriptors
drm/i915/guc: New GuC workqueue item submission mechanism
drm/i915/guc: Add support for resume-parsing wq item
drm/i915/guc: New reset-engine command
drm/i915/guc: Support for extended GuC notification messages
drm/i915/guc: New engine-reset-complete message
drm/i915/guc: New GuC interrupt register for Gen11
drm/i915/guc: New GuC scratch registers for Gen11
drm/i915/huc: New HuC status register for Gen11
drm/i915/guc: Enable command transport buffers for Gen11
HAX Don't enable GuC submission on pre-Gen11 even if forced
drivers/gpu/drm/i915/i915_debugfs.c | 9 +-
drivers/gpu/drm/i915/i915_drv.h | 26 ++-
drivers/gpu/drm/i915/i915_gem_context.c | 11 +-
drivers/gpu/drm/i915/i915_gem_context.h | 2 +
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915_reg.h | 2 +
drivers/gpu/drm/i915/i915_utils.h | 12 +
drivers/gpu/drm/i915/intel_engine_cs.c | 21 +-
drivers/gpu/drm/i915/intel_guc.c | 249 ++++++++++++++++-----
drivers/gpu/drm/i915/intel_guc.h | 9 +-
drivers/gpu/drm/i915/intel_guc_ads.c | 91 ++++++--
drivers/gpu/drm/i915/intel_guc_ct.c | 5 +-
drivers/gpu/drm/i915/intel_guc_fwif.h | 264 +++++++++++++---------
drivers/gpu/drm/i915/intel_guc_reg.h | 7 +
drivers/gpu/drm/i915/intel_guc_submission.c | 329 +++++++++++++++++++++-------
drivers/gpu/drm/i915/intel_huc.c | 58 ++++-
drivers/gpu/drm/i915/intel_lrc.c | 29 ++-
drivers/gpu/drm/i915/intel_ringbuffer.h | 4 +
drivers/gpu/drm/i915/intel_uc.c | 21 ++
drivers/gpu/drm/i915/selftests/intel_guc.c | 2 +-
20 files changed, 863 insertions(+), 289 deletions(-)
--
1.9.1
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