[Intel-gfx] [PATCH 19/21] drm/i915/huc: New HuC status register for Gen11
Michal Wajdeczko
michal.wajdeczko at intel.com
Wed Aug 29 19:18:14 UTC 2018
Gen11 defines new register for checking HuC authentication status.
Look into the right register and bit.
BSpec: 19686
Signed-off-by: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
Cc: Tony Ye <tony.ye at intel.com>
Cc: Vinay Belgaumkar <vinay.belgaumkar at intel.com>
Cc: Michel Thierry <michel.thierry at intel.com>
Cc: John Spotswood <john.a.spotswood at intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa at intel.com>
---
drivers/gpu/drm/i915/intel_guc_reg.h | 3 ++
drivers/gpu/drm/i915/intel_huc.c | 58 +++++++++++++++++++++++++++++++-----
2 files changed, 53 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_reg.h b/drivers/gpu/drm/i915/intel_guc_reg.h
index 2149209..de36595 100644
--- a/drivers/gpu/drm/i915/intel_guc_reg.h
+++ b/drivers/gpu/drm/i915/intel_guc_reg.h
@@ -79,6 +79,9 @@
#define HUC_STATUS2 _MMIO(0xD3B0)
#define HUC_FW_VERIFIED (1<<7)
+#define GEN11_HUC_KERNEL_LOAD_INFO _MMIO(0xC1DC)
+#define HUC_LOAD_SUCCESSFUL (1 << 0)
+
#define GUC_WOPCM_SIZE _MMIO(0xc050)
#define GUC_WOPCM_SIZE_LOCKED (1<<0)
#define GUC_WOPCM_SIZE_SHIFT 12
diff --git a/drivers/gpu/drm/i915/intel_huc.c b/drivers/gpu/drm/i915/intel_huc.c
index 37ef540d..a710c0d 100644
--- a/drivers/gpu/drm/i915/intel_huc.c
+++ b/drivers/gpu/drm/i915/intel_huc.c
@@ -40,6 +40,47 @@ int intel_huc_init_misc(struct intel_huc *huc)
return 0;
}
+static int gen8_huc_wait_verified(struct intel_huc *huc)
+{
+ struct drm_i915_private *i915 = huc_to_i915(huc);
+ u32 status;
+ int ret;
+
+ ret = __intel_wait_for_register(i915,
+ HUC_STATUS2,
+ HUC_FW_VERIFIED,
+ HUC_FW_VERIFIED,
+ 2, 50, &status);
+ if (ret)
+ DRM_ERROR("HuC: status %#x\n", status);
+ return ret;
+}
+
+static int gen11_huc_wait_verified(struct intel_huc *huc)
+{
+ struct drm_i915_private *i915 = huc_to_i915(huc);
+ int ret;
+
+ ret = __intel_wait_for_register(i915,
+ GEN11_HUC_KERNEL_LOAD_INFO,
+ HUC_LOAD_SUCCESSFUL,
+ HUC_LOAD_SUCCESSFUL,
+ 2, 50, NULL);
+ return ret;
+}
+
+static int huc_wait_verified(struct intel_huc *huc)
+{
+ struct drm_i915_private *i915 = huc_to_i915(huc);
+ int ret;
+
+ if (INTEL_GEN(i915) >= 11)
+ ret = gen11_huc_wait_verified(huc);
+ else
+ ret = gen8_huc_wait_verified(huc);
+ return ret;
+}
+
/**
* intel_huc_auth() - Authenticate HuC uCode
* @huc: intel_huc structure
@@ -56,7 +97,6 @@ int intel_huc_auth(struct intel_huc *huc)
struct drm_i915_private *i915 = huc_to_i915(huc);
struct intel_guc *guc = &i915->guc;
struct i915_vma *vma;
- u32 status;
int ret;
if (huc->fw.load_status != INTEL_UC_FIRMWARE_SUCCESS)
@@ -79,13 +119,9 @@ int intel_huc_auth(struct intel_huc *huc)
}
/* Check authentication status, it should be done by now */
- ret = __intel_wait_for_register(i915,
- HUC_STATUS2,
- HUC_FW_VERIFIED,
- HUC_FW_VERIFIED,
- 2, 50, &status);
+ ret = huc_wait_verified(huc);
if (ret) {
- DRM_ERROR("HuC: Firmware not verified %#x\n", status);
+ DRM_ERROR("HuC: Firmware not verified %d\n", ret);
goto fail_unpin;
}
@@ -120,7 +156,13 @@ int intel_huc_check_status(struct intel_huc *huc)
return -ENODEV;
intel_runtime_pm_get(dev_priv);
- status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+
+ if (INTEL_GEN(dev_priv) >= 11)
+ status = I915_READ(GEN11_HUC_KERNEL_LOAD_INFO) &
+ HUC_LOAD_SUCCESSFUL;
+ else
+ status = I915_READ(HUC_STATUS2) & HUC_FW_VERIFIED;
+
intel_runtime_pm_put(dev_priv);
return status;
--
1.9.1
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