[Intel-gfx] [PATCH 4/8] drm/i915: Allocate a common scratch page

[Chris Wilson]

Quoting Mika Kuoppala (2018-12-03 15:28:22)
> Chris Wilson <chris at chris-wilson.co.uk> writes:
> 
> > Currently we allocate a scratch page for each engine, but since we only
> > ever write into it for post-sync operations, it is not exposed to
> > userspace nor do we care for coherency. As we then do not care about its
> > contents, we can use one page for all, reducing our allocations and
> > avoid complications by not assuming per-engine isolation.
> >
> > For later use, it simplifies engine initialisation (by removing the
> > allocation that required struct_mutex!) and means that we can always rely
> > on there being a scratch page.
> >
> > Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> > ---
> > -     ret = i915_gem_contexts_init(dev_priv);
> > +     ret = i915_gem_init_scratch(dev_priv,
> > +                                 IS_GEN2(dev_priv) ? SZ_256K : PAGE_SIZE);

> > @@ -1484,21 +1478,12 @@ static int intel_init_ring_buffer(struct intel_engine_cs *engine)
> >       GEM_BUG_ON(engine->buffer);
> >       engine->buffer = ring;
> >  
> > -     size = PAGE_SIZE;
> > -     if (HAS_BROKEN_CS_TLB(engine->i915))
> > -             size = I830_WA_SIZE;
> 
> Hmm, this disappeared. I don't know this wa details
> but apparently we do need 2 pages for this kind of
> machines.

2 pages? More like 64 pages. See above.
-Chris