[Intel-gfx] [PATCH v2 01/11] drm/i915: Disable PSR in Apple panels

[Souza, Jose]

On Mon, 2018-12-03 at 14:45 -0800, Dhinakaran Pandiyan wrote:
> On Mon, 2018-12-03 at 12:14 -0800, Souza, Jose wrote:
> > On Fri, 2018-11-30 at 15:35 -0800, Dhinakaran Pandiyan wrote:
> > > On Thu, 2018-11-29 at 18:25 -0800, José Roberto de Souza wrote:
> > > > i915 yet don't support PSR in Apple panels, so lets keep it
> > > > disabled
> > > > while we work on that.
> > > > 
> > > > v2: Renamed DP_DPCD_QUIRK_PSR_NOT_CURRENTLY_SUPPORTED to
> > > > DP_DPCD_QUIRK_NO_PSR (Ville)
> > > > 
> > > > Fixes: 598c6cfe0690 (drm/i915/psr: Enable PSR1 on gen-9+ HW)
> > > > Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
> > > > Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
> > > > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> > > > Signed-off-by: José Roberto de Souza <jose.souza at intel.com>
> > > > ---
> > > >  drivers/gpu/drm/drm_dp_helper.c  | 2 ++
> > > >  drivers/gpu/drm/i915/intel_psr.c | 6 ++++++
> > > >  include/drm/drm_dp_helper.h      | 1 +
> > > >  3 files changed, 9 insertions(+)
> > > > 
> > > > diff --git a/drivers/gpu/drm/drm_dp_helper.c
> > > > b/drivers/gpu/drm/drm_dp_helper.c
> > > > index 2d6c491a0542..b00fd5ced0a0 100644
> > > > --- a/drivers/gpu/drm/drm_dp_helper.c
> > > > +++ b/drivers/gpu/drm/drm_dp_helper.c
> > > > @@ -1273,6 +1273,8 @@ static const struct dpcd_quirk
> > > > dpcd_quirk_list[] = {
> > > >  	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID_ANY, true,
> > > > BIT(DP_DPCD_QUIRK_CONSTANT_N) },
> > > >  	/* LG LP140WF6-SPM1 eDP panel */
> > > >  	{ OUI(0x00, 0x22, 0xb9), DEVICE_ID('s', 'i', 'v', 'a',
> > > > 'r',
> > > > 'T'), false, BIT(DP_DPCD_QUIRK_CONSTANT_N) },
> > > > +	/* Apple panels needs some additional handling to
> > > > support PSR
> > > > */
> > > > +	{ OUI(0x00, 0x10, 0xfa), DEVICE_ID_ANY, false,
> > > > BIT(DP_DPCD_QUIRK_NO_PSR) }
> > > >  };
> > > >  
> > > >  #undef OUI
> > > > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > > > b/drivers/gpu/drm/i915/intel_psr.c
> > > > index 2084784f320d..40ca6cc43cc4 100644
> > > > --- a/drivers/gpu/drm/i915/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > > > @@ -278,6 +278,12 @@ void intel_psr_init_dpcd(struct intel_dp
> > > > *intel_dp)
> > > >  		DRM_DEBUG_KMS("Panel lacks power state control,
> > > > PSR
> > > > cannot be enabled\n");
> > > >  		return;
> > > >  	}
> > > > +
> > > > +	if (drm_dp_has_quirk(&intel_dp->desc,
> > > > DP_DPCD_QUIRK_NO_PSR)) {
> > > > +		DRM_DEBUG_KMS("PSR support not currently
> > > > available for
> > > > this panel\n");
> > > > +		return;
> > > > +	}
> > > > +
> > > >  	dev_priv->psr.sink_support = true;
> > > >  	dev_priv->psr.sink_sync_latency =
> > > >  		intel_dp_get_sink_sync_latency(intel_dp);
> > > > diff --git a/include/drm/drm_dp_helper.h
> > > > b/include/drm/drm_dp_helper.h
> > > > index 5736c942c85b..047314ce25d6 100644
> > > > --- a/include/drm/drm_dp_helper.h
> > > > +++ b/include/drm/drm_dp_helper.h
> > > > @@ -1365,6 +1365,7 @@ enum drm_dp_quirk {
> > > >  	 * to 16 bits. So will give a constant value (0x8000)
> > > > for
> > > > compatability.
> > > >  	 */
> > > >  	DP_DPCD_QUIRK_CONSTANT_N,
> > > 
> > > nit: Documentation missing here. I guess we need something along
> > > the
> > > lines of "PSR not supported" without referring to the specific DP
> > > device. With that,
> > > Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
> > 
> > Adding here:
> > 
> > 	/**
> > 	 * @DP_DPCD_QUIRK_NO_PSR
> > 	 *
> > 	 * The device don't properly support PSR even if reports that
> nit: "device does not support"

Thanks

> > it
> > 	 * supports or driver still need to implement proper handling
> 				    ^needs
> > for such
> > 	 * device.
> > 	 */
> > 
> > > 
> > > > +	DP_DPCD_QUIRK_NO_PSR,
> > > >  };
> > > >  
> > > >  /**
-------------- next part --------------
A non-text attachment was scrubbed...
Name: signature.asc
Type: application/pgp-signature
Size: 488 bytes
Desc: This is a digitally signed message part
URL: <https://lists.freedesktop.org/archives/intel-gfx/attachments/20181203/22408337/attachment.sig>