[Intel-gfx] [PATCH] drm/i915/icl: Skip DSI path in DDI vswing programming.

[Dhinakaran Pandiyan]

DSI implements it's own pre_enable hook, encoder output type is never
DSI.

Cc: Manasi Navare <manasi.d.navare at intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni at intel.com>
Cc: James Ausmus <james.ausmus at intel.com>
Fixes: fb5c8e9d4350 ("drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI")
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index f3e1d6a0b7dd..5792632fa6a3 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -2489,13 +2489,8 @@ static void icl_ddi_combo_vswing_program(struct drm_i915_private *dev_priv,
 	/* Set DisableTap2 and DisableTap3 if MIPI DSI
 	 * Clear DisableTap2 and DisableTap3 for all other Ports
 	 */
-	if (type == INTEL_OUTPUT_DSI) {
-		val |= TAP2_DISABLE;
-		val |= TAP3_DISABLE;
-	} else {
-		val &= ~TAP2_DISABLE;
-		val &= ~TAP3_DISABLE;
-	}
+	val &= ~TAP2_DISABLE;
+	val &= ~TAP3_DISABLE;
 	I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val);
 
 	/* Program PORT_TX_DW2 */
-- 
2.17.1