[Intel-gfx] [PATCH] drm/i915: DFSM pipe disable is valid from gen9 onwards

Bob Paauwe bob.j.paauwe at intel.com
Tue Dec 11 17:30:43 UTC 2018


It's not just GEN9 platforms that allow for pipes to be disabled via
the DFSM register, but all later platforms as well.

Signed-off-by: Bob Paauwe <bob.j.paauwe at intel.com>
---
 drivers/gpu/drm/i915/intel_device_info.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 1e56319334f3..7ac641e8c0bd 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -811,7 +811,7 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
 			DRM_INFO("PipeC fused off\n");
 			info->num_pipes -= 1;
 		}
-	} else if (HAS_DISPLAY(dev_priv) && IS_GEN9(dev_priv)) {
+	} else if (HAS_DISPLAY(dev_priv) && (INTEL_GEN(dev_priv) >= 9)) {
 		u32 dfsm = I915_READ(SKL_DFSM);
 		u8 disabled_mask = 0;
 		bool invalid;
-- 
2.17.1



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