[Intel-gfx] [PATCH] drm/i915/dsi: Add PORT_TX_DW7 programming to DSI vswing sequence
kbuild test robot
lkp at intel.com
Sat Dec 15 02:58:58 UTC 2018
Hi Clint,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next]
[also build test ERROR on next-20181214]
[cannot apply to v4.20-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/clinton-a-taylor-intel-com/drm-i915-dsi-Add-PORT_TX_DW7-programming-to-DSI-vswing-sequence/20181215-101421
base: git://anongit.freedesktop.org/drm-intel for-linux-next
config: x86_64-randconfig-x013-201849 (attached as .config)
compiler: gcc-7 (Debian 7.3.0-1) 7.3.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All error/warnings (new ones prefixed by >>):
In file included from drivers/gpu/drm/i915/intel_drv.h:33:0,
from drivers/gpu/drm/i915/intel_dsi.h:30,
from drivers/gpu/drm/i915/icl_dsi.c:30:
drivers/gpu/drm/i915/icl_dsi.c: In function 'dsi_program_swing_and_deemphasis':
>> drivers/gpu/drm/i915/icl_dsi.c:239:19: error: implicit declaration of function 'ICL_PORT_TX_DW7_LN0'; did you mean 'ICL_PORT_TX_DW4_LN0'? [-Werror=implicit-function-declaration]
tmp = I915_READ(ICL_PORT_TX_DW7_LN0(port));
^
drivers/gpu/drm/i915/i915_drv.h:3452:70: note: in definition of macro 'I915_READ'
#define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
^~~
>> drivers/gpu/drm/i915/i915_drv.h:3452:69: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl'
#define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
^
>> drivers/gpu/drm/i915/icl_dsi.c:239:9: note: in expansion of macro 'I915_READ'
tmp = I915_READ(ICL_PORT_TX_DW7_LN0(port));
^~~~~~~~~
drivers/gpu/drm/i915/i915_drv.h:3452:69: note: expected 'i915_reg_t {aka struct <anonymous>}' but argument is of type 'int'
#define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
^
>> drivers/gpu/drm/i915/icl_dsi.c:239:9: note: in expansion of macro 'I915_READ'
tmp = I915_READ(ICL_PORT_TX_DW7_LN0(port));
^~~~~~~~~
>> drivers/gpu/drm/i915/icl_dsi.c:242:14: error: implicit declaration of function 'ICL_PORT_TX_DW7_GRP'; did you mean 'ICL_PORT_TX_DW5_GRP'? [-Werror=implicit-function-declaration]
I915_WRITE(ICL_PORT_TX_DW7_GRP(port), tmp);
^
drivers/gpu/drm/i915/i915_drv.h:3453:76: note: in definition of macro 'I915_WRITE'
#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
^~~
>> drivers/gpu/drm/i915/i915_drv.h:3453:75: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_writel'
#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
^
>> drivers/gpu/drm/i915/icl_dsi.c:242:3: note: in expansion of macro 'I915_WRITE'
I915_WRITE(ICL_PORT_TX_DW7_GRP(port), tmp);
^~~~~~~~~~
drivers/gpu/drm/i915/i915_drv.h:3453:75: note: expected 'i915_reg_t {aka struct <anonymous>}' but argument is of type 'int'
#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
^
>> drivers/gpu/drm/i915/icl_dsi.c:242:3: note: in expansion of macro 'I915_WRITE'
I915_WRITE(ICL_PORT_TX_DW7_GRP(port), tmp);
^~~~~~~~~~
>> drivers/gpu/drm/i915/icl_dsi.c:244:19: error: implicit declaration of function 'ICL_PORT_TX_DW7_AUX'; did you mean 'ICL_PORT_TX_DW2_AUX'? [-Werror=implicit-function-declaration]
tmp = I915_READ(ICL_PORT_TX_DW7_AUX(port));
^
drivers/gpu/drm/i915/i915_drv.h:3452:70: note: in definition of macro 'I915_READ'
#define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
^~~
>> drivers/gpu/drm/i915/i915_drv.h:3452:69: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl'
#define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
^
drivers/gpu/drm/i915/icl_dsi.c:244:9: note: in expansion of macro 'I915_READ'
tmp = I915_READ(ICL_PORT_TX_DW7_AUX(port));
^~~~~~~~~
drivers/gpu/drm/i915/i915_drv.h:3452:69: note: expected 'i915_reg_t {aka struct <anonymous>}' but argument is of type 'int'
#define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true)
^
drivers/gpu/drm/i915/icl_dsi.c:244:9: note: in expansion of macro 'I915_READ'
tmp = I915_READ(ICL_PORT_TX_DW7_AUX(port));
^~~~~~~~~
>> drivers/gpu/drm/i915/i915_drv.h:3453:75: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_writel'
#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
^
drivers/gpu/drm/i915/icl_dsi.c:247:3: note: in expansion of macro 'I915_WRITE'
I915_WRITE(ICL_PORT_TX_DW7_AUX(port), tmp);
^~~~~~~~~~
drivers/gpu/drm/i915/i915_drv.h:3453:75: note: expected 'i915_reg_t {aka struct <anonymous>}' but argument is of type 'int'
#define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true)
^
drivers/gpu/drm/i915/icl_dsi.c:247:3: note: in expansion of macro 'I915_WRITE'
I915_WRITE(ICL_PORT_TX_DW7_AUX(port), tmp);
^~~~~~~~~~
cc1: some warnings being treated as errors
vim +239 drivers/gpu/drm/i915/icl_dsi.c
194
195 static void dsi_program_swing_and_deemphasis(struct intel_encoder *encoder)
196 {
197 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
198 struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
199 enum port port;
200 u32 tmp;
201 int lane;
202
203 for_each_dsi_port(port, intel_dsi->ports) {
204
205 /*
206 * Program voltage swing and pre-emphasis level values as per
207 * table in BSPEC under DDI buffer programing
208 */
209 tmp = I915_READ(ICL_PORT_TX_DW5_LN0(port));
210 tmp &= ~(SCALING_MODE_SEL_MASK | RTERM_SELECT_MASK);
211 tmp |= SCALING_MODE_SEL(0x2);
212 tmp |= TAP2_DISABLE | TAP3_DISABLE;
213 tmp |= RTERM_SELECT(0x6);
214 I915_WRITE(ICL_PORT_TX_DW5_GRP(port), tmp);
215
216 tmp = I915_READ(ICL_PORT_TX_DW5_AUX(port));
217 tmp &= ~(SCALING_MODE_SEL_MASK | RTERM_SELECT_MASK);
218 tmp |= SCALING_MODE_SEL(0x2);
219 tmp |= TAP2_DISABLE | TAP3_DISABLE;
220 tmp |= RTERM_SELECT(0x6);
221 I915_WRITE(ICL_PORT_TX_DW5_AUX(port), tmp);
222
223 tmp = I915_READ(ICL_PORT_TX_DW2_LN0(port));
224 tmp &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK |
225 RCOMP_SCALAR_MASK);
226 tmp |= SWING_SEL_UPPER(0x2);
227 tmp |= SWING_SEL_LOWER(0x2);
228 tmp |= RCOMP_SCALAR(0x98);
229 I915_WRITE(ICL_PORT_TX_DW2_GRP(port), tmp);
230
231 tmp = I915_READ(ICL_PORT_TX_DW2_AUX(port));
232 tmp &= ~(SWING_SEL_LOWER_MASK | SWING_SEL_UPPER_MASK |
233 RCOMP_SCALAR_MASK);
234 tmp |= SWING_SEL_UPPER(0x2);
235 tmp |= SWING_SEL_LOWER(0x2);
236 tmp |= RCOMP_SCALAR(0x98);
237 I915_WRITE(ICL_PORT_TX_DW2_AUX(port), tmp);
238
> 239 tmp = I915_READ(ICL_PORT_TX_DW7_LN0(port));
240 tmp &= ~(N_SCALAR_MASK);
241 tmp |= N_SCALAR(0x7f);
> 242 I915_WRITE(ICL_PORT_TX_DW7_GRP(port), tmp);
243
> 244 tmp = I915_READ(ICL_PORT_TX_DW7_AUX(port));
245 tmp &= ~(N_SCALAR_MASK);
246 tmp |= N_SCALAR(0x7f);
247 I915_WRITE(ICL_PORT_TX_DW7_AUX(port), tmp);
248
249 tmp = I915_READ(ICL_PORT_TX_DW4_AUX(port));
250 tmp &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK |
251 CURSOR_COEFF_MASK);
252 tmp |= POST_CURSOR_1(0x0);
253 tmp |= POST_CURSOR_2(0x0);
254 tmp |= CURSOR_COEFF(0x3f);
255 I915_WRITE(ICL_PORT_TX_DW4_AUX(port), tmp);
256
257 for (lane = 0; lane <= 3; lane++) {
258 /* Bspec: must not use GRP register for write */
259 tmp = I915_READ(ICL_PORT_TX_DW4_LN(port, lane));
260 tmp &= ~(POST_CURSOR_1_MASK | POST_CURSOR_2_MASK |
261 CURSOR_COEFF_MASK);
262 tmp |= POST_CURSOR_1(0x0);
263 tmp |= POST_CURSOR_2(0x0);
264 tmp |= CURSOR_COEFF(0x3f);
265 I915_WRITE(ICL_PORT_TX_DW4_LN(port, lane), tmp);
266 }
267 }
268 }
269
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/pipermail/kbuild-all Intel Corporation
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