[Intel-gfx] [PATCH 1/3] drm/i915: Prepare for larger CSB status FIFO size

[Chris Wilson]

Quoting Mika Kuoppala (2018-12-18 13:24:23)
> @@ -867,7 +867,7 @@ static void process_csb(struct intel_engine_cs *engine)
>         struct intel_engine_execlists * const execlists = &engine->execlists;
>         struct execlist_port *port = execlists->port;
>         const u32 * const buf = execlists->csb_status;
> -       u8 head, tail;
> +       u8 head, tail, entries;
>  
>         /*
>          * Note that csb_write, csb_status may be either in HWSP or mmio.
> @@ -885,6 +885,8 @@ static void process_csb(struct intel_engine_cs *engine)
>         if (unlikely(head == tail))
>                 return;
>  
> +       entries = execlists->csb_size;

Misplaced; as we certainly don't want it between the read and rmb.
So just go for const u8 entries = execlists->csb_size.
-Chris