[Intel-gfx] [PATCH 7/9] drm/i915: Drop the definite article in front of SAGV

[Rodrigo Vivi]

On Fri, Dec 21, 2018 at 07:14:34PM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> 
> The spec doesn't use a definite article in front of SAGV. The
> rules regarding articles and initialisms are super fuzzy, but
> at least to my ears it sounds much more natural to not have
> the article. Perhaps because I tend to pronounce it as
> "sag-vee" instead of spelling out the letters one at a time.
> Actually I might still prefer to leave out the article if I
> did spell them out.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

> ---
>  drivers/gpu/drm/i915/intel_pm.c | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 40cb18c61e11..0843990ebf9f 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -3667,25 +3667,25 @@ intel_enable_sagv(struct drm_i915_private *dev_priv)
>  	if (dev_priv->sagv_status == I915_SAGV_ENABLED)
>  		return 0;
>  
> -	DRM_DEBUG_KMS("Enabling the SAGV\n");
> +	DRM_DEBUG_KMS("Enabling SAGV\n");
>  	mutex_lock(&dev_priv->pcu_lock);
>  
>  	ret = sandybridge_pcode_write(dev_priv, GEN9_PCODE_SAGV_CONTROL,
>  				      GEN9_SAGV_ENABLE);
>  
> -	/* We don't need to wait for the SAGV when enabling */
> +	/* We don't need to wait for SAGV when enabling */
>  	mutex_unlock(&dev_priv->pcu_lock);
>  
>  	/*
>  	 * Some skl systems, pre-release machines in particular,
> -	 * don't actually have an SAGV.
> +	 * don't actually have SAGV.
>  	 */
>  	if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
>  		DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n");
>  		dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
>  		return 0;
>  	} else if (ret < 0) {
> -		DRM_ERROR("Failed to enable the SAGV\n");
> +		DRM_ERROR("Failed to enable SAGV\n");
>  		return ret;
>  	}
>  
> @@ -3704,7 +3704,7 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
>  	if (dev_priv->sagv_status == I915_SAGV_DISABLED)
>  		return 0;
>  
> -	DRM_DEBUG_KMS("Disabling the SAGV\n");
> +	DRM_DEBUG_KMS("Disabling SAGV\n");
>  	mutex_lock(&dev_priv->pcu_lock);
>  
>  	/* bspec says to keep retrying for at least 1 ms */
> @@ -3716,14 +3716,14 @@ intel_disable_sagv(struct drm_i915_private *dev_priv)
>  
>  	/*
>  	 * Some skl systems, pre-release machines in particular,
> -	 * don't actually have an SAGV.
> +	 * don't actually have SAGV.
>  	 */
>  	if (IS_SKYLAKE(dev_priv) && ret == -ENXIO) {
>  		DRM_DEBUG_DRIVER("No SAGV found on system, ignoring\n");
>  		dev_priv->sagv_status = I915_SAGV_NOT_CONTROLLED;
>  		return 0;
>  	} else if (ret < 0) {
> -		DRM_ERROR("Failed to disable the SAGV (%d)\n", ret);
> +		DRM_ERROR("Failed to disable SAGV (%d)\n", ret);
>  		return ret;
>  	}
>  
> @@ -3754,7 +3754,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
>  		sagv_block_time_us = 10;
>  
>  	/*
> -	 * SKL+ workaround: bspec recommends we disable the SAGV when we have
> +	 * SKL+ workaround: bspec recommends we disable SAGV when we have
>  	 * more then one pipe enabled
>  	 *
>  	 * If there are no active CRTCs, no additional checks need be performed
> @@ -3795,7 +3795,7 @@ bool intel_can_enable_sagv(struct drm_atomic_state *state)
>  		/*
>  		 * If any of the planes on this pipe don't enable wm levels that
>  		 * incur memory latencies higher than sagv_block_time_us we
> -		 * can't enable the SAGV.
> +		 * can't enable SAGV.
>  		 */
>  		if (latency < sagv_block_time_us)
>  			return false;
> -- 
> 2.19.2
> 
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