[Intel-gfx] [PATCH 3/5] drm/i915: Enable vblanks after verifying power domain states.
Dhinakaran Pandiyan
dhinakaran.pandiyan at intel.com
Wed Jan 3 20:39:59 UTC 2018
Since we want to allow for a non-blocking power domain for vblanks,
the power domain use count and power well use count will not be updated
atomically inside the power domain mutex (see next patch). This affects
verifying if sum(power_domain_use_count) == power_well_use_count at
init time. So do not enable vblanks until this verification is done.
Cc: Daniel Vetter <daniel.vetter at ffwll.ch>
Cc: Ville Syrjälä <ville.syrjala at linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi at intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst at linux.intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 24 ++++++++++++++++++++----
1 file changed, 20 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 0cd355978ab4..7bc874b8dac7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -14739,6 +14739,24 @@ static bool has_pch_trancoder(struct drm_i915_private *dev_priv,
(HAS_PCH_LPT_H(dev_priv) && pch_transcoder == PIPE_A);
}
+static void modeset_enable_vblanks(struct drm_i915_private *dev_priv)
+{
+ enum pipe pipe;
+
+ for_each_pipe(dev_priv, pipe) {
+ struct intel_crtc *crtc;
+
+ crtc = intel_get_crtc_for_pipe(dev_priv, pipe);
+
+ /* restore vblank interrupts to correct state */
+ drm_crtc_vblank_reset(&crtc->base);
+
+ if (crtc->active)
+ drm_crtc_vblank_on(&crtc->base);
+ }
+}
+
+
static void intel_sanitize_crtc(struct intel_crtc *crtc,
struct drm_modeset_acquire_ctx *ctx)
{
@@ -14754,13 +14772,9 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK);
}
- /* restore vblank interrupts to correct state */
- drm_crtc_vblank_reset(&crtc->base);
if (crtc->active) {
struct intel_plane *plane;
- drm_crtc_vblank_on(&crtc->base);
-
/* Disable everything but the primary plane */
for_each_intel_plane_on_crtc(dev, crtc, plane) {
const struct intel_plane_state *plane_state =
@@ -15147,6 +15161,8 @@ intel_modeset_setup_hw_state(struct drm_device *dev,
intel_power_domains_verify_state(dev_priv);
+ modeset_enable_vblanks(dev_priv);
+
intel_fbc_init_pipe_state(dev_priv);
}
--
2.11.0
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