[Intel-gfx] [PATCH] drm/i915: Whitelist SLICE_COMMON_ECO_CHICKEN1 on Geminilake.

[Chris Wilson]

Quoting Kenneth Graunke (2018-01-04 19:38:05)
> Geminilake requires the 3D driver to select whether barriers are
> intended for compute shaders, or tessellation control shaders, by
> whacking a "Barrier Mode" bit in SLICE_COMMON_ECO_CHICKEN1 when
> switching pipelines.  Failure to do this properly can result in GPU
> hangs.
> 
> Unfortunately, this means it needs to switch mid-batch, so only
> userspace can properly set it.  To facilitate this, the kernel needs
> to whitelist the register.
> 
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> Cc: stable at vger.kernel.org
> ---
>  drivers/gpu/drm/i915/i915_reg.h        | 2 ++
>  drivers/gpu/drm/i915/intel_engine_cs.c | 5 +++++
>  2 files changed, 7 insertions(+)
> 
> Hello,
> 
> We unfortunately need to whitelist an extra register for GPU hang fix
> on Geminilake.  Here's the corresponding Mesa patch:

Thankfully it appears to be context saved. Has a w/a name been assigned
for this?
-Chris