[Intel-gfx] [PATCH 10/27] drm/i915/icl: Enhanced execution list support

Chris Wilson chris at chris-wilson.co.uk
Wed Jan 10 09:45:06 UTC 2018


Quoting Paulo Zanoni (2018-01-09 23:28:18)
> From: Thomas Daniel <thomas.daniel at intel.com>
> 
> Supports two-element submission using the new enhanced execlist mechanism
> 
> v2: Rebase.
> v3: Switch from !IS_GEN11 to GEN < 11 (Daniele Ceraolo Spurio).
> v4: Use the elsq registers instead of elsp. (Daniele Ceraolo Spurio)
> 
> Signed-off-by: Thomas Daniel <thomas.daniel at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_lrc.c | 21 ++++++++++++++++++++-
>  drivers/gpu/drm/i915/intel_lrc.h |  3 +++
>  2 files changed, 23 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index de41ad2d5fbc..3c6f587fa903 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -430,9 +430,18 @@ static inline void elsp_write(u64 desc, u32 __iomem *elsp)
>  
>  static void execlists_submit_ports(struct intel_engine_cs *engine)
>  {
> +       struct drm_i915_private *dev_priv = engine->i915;
>         struct execlist_port *port = engine->execlists.port;
> +       u32 __iomem *elsq =
> +               engine->i915->regs + i915_mmio_reg_offset(RING_ELSQ(engine));

Overwrite engine->execlists.elsp with the alternate address.

>         unsigned int n;
>  
> +       /*
> +        * Gen11+ note: the submit queue is not cleared after being submitted
> +        * to the HW so we need to make sure we always clean it up. This is
> +        * currently ensured by the fact that we always write the same number
> +        * of elsq entries, keep this in mind before changing the loop below.
> +        */
>         for (n = execlists_num_ports(&engine->execlists); n--; ) {
>                 struct drm_i915_gem_request *rq;
>                 unsigned int count;
> @@ -456,8 +465,18 @@ static void execlists_submit_ports(struct intel_engine_cs *engine)
>                         desc = 0;
>                 }
>  
> -               elsp_write(desc, engine->execlists.elsp);
> +               if (INTEL_GEN(engine->i915) >= 11) {
> +                       writel(lower_32_bits(desc), elsq + n * 2);
> +                       writel(upper_32_bits(desc), elsq + n * 2 + 1);
> +               } else {
> +                       elsp_write(desc, engine->execlists.elsp);
> +               }

Missed the other consumer of elsp_write, preemption. So add the offset
to elsp_write() and do the magic there. It may even be worth a vfunc.
-Chris


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