[Intel-gfx] [PATCH 00/27] ICL basic enabling + GEM

Thu Jan 11 01:32:28 UTC 2018

On Tue, Jan 09, 2018 at 11:23:09PM +0000, Paulo Zanoni wrote:
> Hello
> 
> This is the first series of patches for the Icelake platform. Unlike the other
> series that introduced new platforms, this one is very small and only contains
> patches for very basic enabling, interrupts and some GEM code. No patches for
> display or other subsystems yet and GEM is not complete either. I'm hoping that
> by splitting Icelake enabling into many small series progress will be better
> tracked and people only interested in one area of the code will be able to
> ignore everything else more easily. In addition, except for the first very few
> patches of this series, many of the sub-series that will follow are independent
> from each other and can be merged in any order. And on top of everything,
> tracking down any possible issues identified by the CI system will be easier if
> the problem is in a series with 20 patches instead of 160 patches.

good idea.

> 
> Another point worth mentioning is that some patches already have Reviewed-by
> tags. It is important to remind everybody that those tags were often given to
> some early versions of those patches, and rebasing happened since then due to
> the fast development pacing of our driver. Reworks may have landed on the
> upstream driver that we missed while rebasing, so it is likely that some reworks
> need to be applied to these patches now. I considered just removing the R-B tags
> before submitting the patches here, but I think it's probably better if we give
> credit to people who already spent time trying to check for problems in earlier
> versions of the patches. So, those patches that already have R-B tags need to be
> re-reviewed now, and special consideration should be given to any rebasing
> problems. I'd love to see some "R-b tag still stands" emails.

I'm glad you didn't removed the rv-b tags. The review process that
happened so far was very productive. Let's keep the right credits in place and
take extra care when merging to dinq. Let's only merge what we are confident
that review is still valid or ask for re-reviews and extra acks.

One idea that I heard this morning was to use on internal some custom tag
like "Internally-Reviewed-by:" but I don't like this idea of adding custom
tags and I trust our commiters to differentiate between valid internal reviews
and risky ones. Agree?

Thoughts?

> 
> Display-related patches and other series should arrive soon.
> 
> Thanks,
> Paulo
> 
> Ceraolo Spurio, Daniele (1):
>   drm/i915/icl: new context descriptor support
> 
> Daniele Ceraolo Spurio (1):
>   drm/i915/icl: Gen11 forcewake support
> 
> Kelvin Gardiner (2):
>   drm/i915/icl: Update subslice define for ICL 11
>   drm/i915/icl: Added ICL 11 slice, subslice and EU fuse detection
> 
> Michel Thierry (2):
>   drm/i915/icl: Add Indirect Context Offset for Gen11
>   drm/i915/icl: Add reset control register changes
> 
> Oscar Mateo (7):
>   drm/i915/icl: Correctly initialize the Gen11 engines
>   drm/i915/icl: Check for fused-off VDBOX and VEBOX instances
>   drm/i915/icl: Enable the extra video decode and enhancement boxes for
>     Icelake 11
>   drm/i915/icl: Make use of the SW counter field in the new context
>     descriptor
>   drm/i915/icl: Split out the servicing of the Selector and Shared IIR
>     registers
>   drm/i915/icl: Handle RPS interrupts correctly for Gen11
>   drm/i915/icl: Enable RC6 and RPS in Gen11
> 
> Paulo Zanoni (4):
>   drm/i915/icl: Add the ICL PCI IDs
>   drm/i915/icl: add icelake_init_clock_gating()
>   drm/i915/icl: allow the reg_read ioctl to read the RCS TIMESTAMP
>     register
>   drm/i915/gen11: add support for reading the timestamp frequency
> 
> Rodrigo Vivi (1):
>   drm/i915/icl: Add initial Icelake definitions.
> 
> Thomas Daniel (1):
>   drm/i915/icl: Enhanced execution list support
> 
> Tomasz Lis (1):
>   drm/i915/icl: Add configuring MOCS in new Icelake engines
> 
> Tvrtko Ursulin (6):
>   drm/i915/icl: Icelake interrupt register addresses and bits
>   drm/i915/icl: Show interrupt registers in debugfs
>   drm/i915/icl: Prepare for more rings
>   drm/i915/icl: Interrupt handling
>   drm/i915/icl: Ringbuffer interrupt handling
>   drm/i915/icl: Gen11 render context size
> 
> kgardine (1):
>   drm/i915/icl: Set graphics mode register for gen11
> 
>  drivers/gpu/drm/i915/i915_debugfs.c           |  92 ++++++++-
>  drivers/gpu/drm/i915/i915_drv.c               |   2 +
>  drivers/gpu/drm/i915/i915_drv.h               |  16 +-
>  drivers/gpu/drm/i915/i915_gem.h               |   2 +-
>  drivers/gpu/drm/i915/i915_gem_context.c       |  14 +-
>  drivers/gpu/drm/i915/i915_gem_context.h       |   2 +
>  drivers/gpu/drm/i915/i915_irq.c               | 274 +++++++++++++++++++++++++-
>  drivers/gpu/drm/i915/i915_pci.c               |  15 ++
>  drivers/gpu/drm/i915/i915_reg.h               | 119 ++++++++++-
>  drivers/gpu/drm/i915/intel_breadcrumbs.c      |  20 +-
>  drivers/gpu/drm/i915/intel_device_info.c      | 153 ++++++++++++--
>  drivers/gpu/drm/i915/intel_device_info.h      |  10 +-
>  drivers/gpu/drm/i915/intel_drv.h              |   1 +
>  drivers/gpu/drm/i915/intel_engine_cs.c        |  46 ++++-
>  drivers/gpu/drm/i915/intel_lrc.c              |  79 +++++++-
>  drivers/gpu/drm/i915/intel_lrc.h              |   3 +
>  drivers/gpu/drm/i915/intel_mocs.c             |   5 +-
>  drivers/gpu/drm/i915/intel_pm.c               |  22 ++-
>  drivers/gpu/drm/i915/intel_ringbuffer.h       |  16 +-
>  drivers/gpu/drm/i915/intel_uncore.c           | 203 ++++++++++++++++++-
>  drivers/gpu/drm/i915/intel_uncore.h           |  27 ++-
>  drivers/gpu/drm/i915/selftests/intel_uncore.c |  30 ++-
>  include/drm/i915_pciids.h                     |  11 ++
>  23 files changed, 1083 insertions(+), 79 deletions(-)
> 
> -- 
> 2.14.3
> 
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