[Intel-gfx] [PATCH 3/6] drm/i915/debugfs: add rcs topology entry
Lionel Landwerlin
lionel.g.landwerlin at intel.com
Thu Jan 11 17:04:03 UTC 2018
On 11/01/18 11:31, Tvrtko Ursulin wrote:
>
> On 18/12/2017 15:35, Lionel Landwerlin wrote:
>> While the end goal is to make this information available to userspace
>> through a new ioctl, there is no reason we can't display it in a human
>> readable fashion through debugfs.
>>
>> slice0 (subslice_mask=0x7):
>
> I'd add a subslice count while at it, since the eu lines have counts.
>
> Bike-shedding on whether counts or masks are typically more important?
>
> Slice0: 3 slices (0x7):
> Subslice 0: 8 EUs (0xff)
> Subslice 1: 8 EUs (0xff)
> ...
>
> ?
Yeah, sure.
>
>> subslice0:
>> eu_mask: 0xff (8)
>> subslice1:
>> eu_mask: 0xff (8)
>> subslice2:
>> eu_mask: 0xff (8)
>> subslice3:
>> eu_mask: 0x0 (0)
>> slice1 (subslice_mask=0x7):
>> subslice0:
>> eu_mask: 0xff (8)
>> subslice1:
>> eu_mask: 0xff (8)
>> subslice2:
>> eu_mask: 0xff (8)
>> subslice3:
>> eu_mask: 0x0 (0)
>> slice2 (subslice_mask=0x7):
>> subslice0:
>> eu_mask: 0xff (8)
>> subslice1:
>> eu_mask: 0xff (8)
>> subslice2:
>> eu_mask: 0xff (8)
>> subslice3:
>> eu_mask: 0x0 (0)
>>
>> Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_debugfs.c | 37
>> +++++++++++++++++++++++++++++++++++++
>> 1 file changed, 37 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
>> b/drivers/gpu/drm/i915/i915_debugfs.c
>> index 6ec7543e698f..79ca6e9f9ec9 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -3173,6 +3173,42 @@ static int i915_engine_info(struct seq_file
>> *m, void *unused)
>> return 0;
>> }
>> +static int i915_rcs_topology(struct seq_file *m, void *unused)
>> +{
>> + struct drm_i915_private *dev_priv = node_to_i915(m->private);
>> + const struct sseu_dev_info *sseu = &INTEL_INFO(dev_priv)->sseu;
>> + int s, ss;
>> + int subslice_stride = ALIGN(sseu->max_eus_per_subslice, 8) / 8;
>> + int slice_stride = sseu->max_subslices * subslice_stride;
>
> Another case for the before mentioned helper for indexing into eu_mask
> array?
Done.
>
>> +
>> + if (sseu->max_slices == 0) {
>> + seq_printf(m, "Unavailable\n");
>> + return 0;
>> + }
>
> Is this possible?
Yeah, there are no registers to read on anything < gen8.
I've decided not to generate data there. Most userspaces already has the
numbers from a table by pci-id.
>
>> +
>> + for (s = 0; s < sseu->max_slices; s++) {
>> + seq_printf(m, "slice%i (subslice_mask=0x%x):\n",
>
> %i always confuses me. Googling shows it is equivalent to %d for
> printing? Or is it something different in kernel space? If it is
> equivalent I would go with a more standard one. And I would even
> change to unsigned variables for iterators but I realize some people
> have a different opinion so up to you.
Yeah, I'm always using %i, but I must be the only one.
It's been easier to remember int -> %i.
>
>> + s, sseu->subslices_mask[s]);
>> +
>> + for (ss = 0; ss < slice_stride / subslice_stride; ss++) {
>
> With the indexing helpers hopefully it would be possible to simply
> iterate to hweight8(sseu->sublice_mask[s]) ?
Actually I should use sseu->max_subslices.
>
>> + int eu, n_subslice_eus = 0;
>> +
>> + seq_printf(m, "\tsubslice%i:\n", ss);
>> +
>> + seq_printf(m, "\t\teu_mask:");
>> + for (eu = 0; eu < subslice_stride; eu++) {
>> + u8 val = sseu->eu_mask[s * slice_stride +
>> + ss * subslice_stride + eu];
>> + seq_printf(m, " 0x%x", val);
>> + n_subslice_eus += hweight8(val);
>> + }
>> + seq_printf(m, " (%i)\n", n_subslice_eus);
>> + }
>> + }
>> +
>> + return 0;
>> +}
>> +
>> static int i915_shrinker_info(struct seq_file *m, void *unused)
>> {
>> struct drm_i915_private *i915 = node_to_i915(m->private);
>> @@ -4658,6 +4694,7 @@ static const struct drm_info_list
>> i915_debugfs_list[] = {
>> {"i915_dmc_info", i915_dmc_info, 0},
>> {"i915_display_info", i915_display_info, 0},
>> {"i915_engine_info", i915_engine_info, 0},
>> + {"i915_rcs_topology", i915_rcs_topology, 0},
>> {"i915_shrinker_info", i915_shrinker_info, 0},
>> {"i915_shared_dplls_info", i915_shared_dplls_info, 0},
>> {"i915_dp_mst_info", i915_dp_mst_info, 0},
>>
>
> Regards,
>
> Tvrtko
>
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