[Intel-gfx] [PATCH 11/27] drm/i915/icl: Gen11 render context size
Oscar Mateo
oscar.mateo at intel.com
Thu Jan 11 18:20:36 UTC 2018
On 01/10/2018 05:21 PM, Rodrigo Vivi wrote:
> On Tue, Jan 09, 2018 at 11:28:19PM +0000, Paulo Zanoni wrote:
>> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>>
>> The current size may be bigger than the correct one, this needs to be
>> revisited later.
> I don't believe this is true anymore. When this was written initially CNL had a higher value.
>
> Higher values are ok, but smaller can be problematic if I understood correctly.
>
> So we might need to check the accurate number.
>
> Oscar has a good method for that if iirc ;)
My method says 14 pages. Seems a bit low, so I went ahead and tested it.
Everything seems to work fine, so I'll send a new patch.
>> v2: Rebase.
>>
>> Acked-by: Ben Widawsky <benjamin.widawsky at intel.com>
>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
>> 1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
>> index e88b2fd44724..a373bcbd85d8 100644
>> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
>> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
>> @@ -181,6 +181,8 @@ __intel_engine_context_size(struct drm_i915_private *dev_priv, u8 class)
>> switch (INTEL_GEN(dev_priv)) {
>> default:
>> MISSING_CASE(INTEL_GEN(dev_priv));
>> + case 11:
>> + /* TODO: Make sure this is correct. */
>> case 10:
>> return GEN10_LR_CONTEXT_RENDER_SIZE;
>> case 9:
>> --
>> 2.14.3
>>
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