[Intel-gfx] [PATCH v3] drm/i915/icl: Gen11 render context size

Rodrigo Vivi rodrigo.vivi at intel.com
Thu Jan 11 19:40:40 UTC 2018


On Thu, Jan 11, 2018 at 06:23:20PM +0000, Oscar Mateo wrote:
> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> 
> Gen11 removes the Resource Streamer, which frees up a big chunk of
> the context image. BSpec indicates 12538 DWORDs (13 pages), plus
> one page for PPHWSP.
> 
> Please notice that, when looking at the BSpec context image table,
> the right filter has to be applied (e.g. "IcelakeLP") as some rows
> are excluded for specific GENs. Also, some rows apply per-subslice
> (for the calculation above, we have supposed 8 subslices which is
> the maximum SKU we expect).
> 
> v2: Rebase.
> v3: Use the right size as per the BSpec.
> 
> BSpec: 18907
> 
> Acked-by: Ben Widawsky <benjamin.widawsky at intel.com>
> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index e88b2fd..79b7d36 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -41,6 +41,7 @@
>  #define GEN8_LR_CONTEXT_RENDER_SIZE	(20 * PAGE_SIZE)
>  #define GEN9_LR_CONTEXT_RENDER_SIZE	(22 * PAGE_SIZE)
>  #define GEN10_LR_CONTEXT_RENDER_SIZE	(18 * PAGE_SIZE)
> +#define GEN11_LR_CONTEXT_RENDER_SIZE	(14 * PAGE_SIZE)
>  
>  #define GEN8_LR_CONTEXT_OTHER_SIZE	( 2 * PAGE_SIZE)
>  
> @@ -181,6 +182,8 @@ struct engine_info {
>  		switch (INTEL_GEN(dev_priv)) {
>  		default:
>  			MISSING_CASE(INTEL_GEN(dev_priv));

I believe this default is getting danger as we decrease the size here.
I believe the safest one for missing case is the largest one whatever that is.

> +		case 11:
> +			return GEN11_LR_CONTEXT_RENDER_SIZE;
>  		case 10:
>  			return GEN10_LR_CONTEXT_RENDER_SIZE;
>  		case 9:
> -- 
> 1.9.1
> 
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