[Intel-gfx] [PATCH 1/2] drm/i915: Return a default RCS context size

[Daniele Ceraolo Spurio]

On 11/01/18 14:55, Oscar Mateo wrote:
> Instead of returning whatever size the latest GEN used. This is because
> context sizes for new GENs can go up or down, but the only safe thing to
> do for missing cases is to use the largest known one, whatever that is.
> 
> Suggested-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
> Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_engine_cs.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index e88b2fd..db758c5 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -38,6 +38,7 @@
>    */
>   #define HSW_CXT_TOTAL_SIZE		(17 * PAGE_SIZE)
>   

Could use a comment here with the explanation in the commit message, but 
it is relatively clear anyway, so:

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>

Thanks,
Daniele

> +#define DEFAULT_LR_CONTEXT_RENDER_SIZE	(22 * PAGE_SIZE)
>   #define GEN8_LR_CONTEXT_RENDER_SIZE	(20 * PAGE_SIZE)
>   #define GEN9_LR_CONTEXT_RENDER_SIZE	(22 * PAGE_SIZE)
>   #define GEN10_LR_CONTEXT_RENDER_SIZE	(18 * PAGE_SIZE)
> @@ -181,6 +182,7 @@ struct engine_info {
>   		switch (INTEL_GEN(dev_priv)) {
>   		default:
>   			MISSING_CASE(INTEL_GEN(dev_priv));
> +			return DEFAULT_LR_CONTEXT_RENDER_SIZE;
>   		case 10:
>   			return GEN10_LR_CONTEXT_RENDER_SIZE;
>   		case 9:
>