[Intel-gfx] [PATCH v2 3/6] drm/i915/debugfs: add rcs topology entry

[Lionel Landwerlin]

On 12/01/18 10:21, Tvrtko Ursulin wrote:
>
> On 11/01/2018 19:53, Lionel Landwerlin wrote:
>> While the end goal is to make this information available to userspace
>> through a new ioctl, there is no reason we can't display it in a human
>> readable fashion through debugfs.
>>
>> slice0: 3 subslice(s) (0x7):
>>     subslice0: 8 EUs (0xff)
>>     subslice1: 8 EUs (0xff)
>>     subslice2: 8 EUs (0xff)
>>     subslice3: 0 EUs (0x0)
>> slice1: 3 subslice(s) (0x7):
>>     subslice0: 8 EUs (0xff)
>>     subslice1: 8 EUs (0xff)
>>     subslice2: 8 EUs (0xff)
>>     subslice3: 0 EUs (0x0)
>> slice2: 3 subslice(s) (0x7):
>>     subslice0: 8 EUs (0xff)
>>     subslice1: 8 EUs (0xff)
>>     subslice2: 8 EUs (0xff)
>>     subslice3: 0 EUs (0x0)
>>
>> v2: Reformat debugfs printing (Tvrtko)
>>      Use the new EU mask helper (Tvrtko)
>>
>> Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
>> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
>> ---
>>   drivers/gpu/drm/i915/i915_debugfs.c | 42 
>> +++++++++++++++++++++++++++++++++++++
>>   1 file changed, 42 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
>> b/drivers/gpu/drm/i915/i915_debugfs.c
>> index 2d1c9cce5fe4..83af1029b907 100644
>> --- a/drivers/gpu/drm/i915/i915_debugfs.c
>> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
>> @@ -3162,6 +3162,47 @@ static int i915_engine_info(struct seq_file 
>> *m, void *unused)
>>       return 0;
>>   }
>>   +static int i915_rcs_topology(struct seq_file *m, void *unused)
>> +{
>> +    struct drm_i915_private *dev_priv = node_to_i915(m->private);
>> +    const struct sseu_dev_info *sseu = &INTEL_INFO(dev_priv)->sseu;
>> +    int s, ss;
>> +    int subslice_stride =
>> +        DIV_ROUND_UP(sseu->max_eus_per_subslice, BITS_PER_BYTE);
>
> BITS_PER_BYTE is sizeof(eu_mask[0]) * BITS_PER_BYTE ?

If you have 8 or less EUs per subslice, yes.

>
>> +
>> +    if (sseu->max_slices == 0) {
>> +        seq_printf(m, "Unavailable\n");
>> +        return 0;
>> +    }
>> +
>> +    for (s = 0; s < sseu->max_slices; s++) {
>> +        seq_printf(m, "slice%i: %u subslice(s) (0x%hhx):\n",
>> +               s, hweight8(sseu->subslice_mask[s]),
>> +               sseu->subslice_mask[s]);
>> +
>> +        for (ss = 0; ss < sseu->max_subslices; ss++) {
>> +            int eu_group, n_subslice_eus = 0;
>> +
>> +            for (eu_group = 0; eu_group < subslice_stride; 
>> eu_group++) {
>> +                n_subslice_eus +=
>> +                    hweight8(sseu_eu_mask(sseu, s, ss, eu_group));
>> +            }
>
> Still trying to understand eu_group concept - is this just to handle 
> more than 8 EUs couple with the fact you chose eu_mask to be u8? Or is 
> a hw concept?

It's not a hw concept. I just wanted to make sure we had a plan if one 
day we end up with more than 8 EUs per subslice.

>
> Regards,
>
> Tvrtko
>
>> +
>> +            seq_printf(m, "\tsubslice%i: %u EUs (", ss, 
>> n_subslice_eus);
>> +            for (eu_group = 0;
>> +                 eu_group < max(0, subslice_stride - 1);
>> +                 eu_group++) {
>> +                u8 val = sseu_eu_mask(sseu, s, ss, eu_group);
>> +                seq_printf(m, "0x%hhx, ", val);
>> +            }
>> +            seq_printf(m, "0x%hhx)\n",
>> +                   sseu_eu_mask(sseu, s, ss, subslice_stride - 1));
>> +        }
>> +    }
>> +
>> +    return 0;
>> +}
>> +
>>   static int i915_shrinker_info(struct seq_file *m, void *unused)
>>   {
>>       struct drm_i915_private *i915 = node_to_i915(m->private);
>> @@ -4692,6 +4733,7 @@ static const struct drm_info_list 
>> i915_debugfs_list[] = {
>>       {"i915_dmc_info", i915_dmc_info, 0},
>>       {"i915_display_info", i915_display_info, 0},
>>       {"i915_engine_info", i915_engine_info, 0},
>> +    {"i915_rcs_topology", i915_rcs_topology, 0},
>>       {"i915_shrinker_info", i915_shrinker_info, 0},
>>       {"i915_shared_dplls_info", i915_shared_dplls_info, 0},
>>       {"i915_dp_mst_info", i915_dp_mst_info, 0},
>>
>