[Intel-gfx] [PATCH 1/2] drm/i915: Add display WA #1175 for planes ending close to right screen edge

Chris Wilson chris at chris-wilson.co.uk
Fri Jan 12 15:13:19 UTC 2018


Quoting Imre Deak (2018-01-12 14:54:36)
> As described in the WA on GLK and CNL planes on the right edge of the
> screen that have less than 4 pixels visible from the beginning of the
> plane to the edge of the screen can cause FIFO underflow and display
> corruption.
> 
> On GLK/CNL I could trigger the problem only if the plane was at the same
> time also aligned to the top edge of the screen (after clipping) and
> there were exactly 2 pixels visible from the start of the plane to the
> right edge of the screen (so couldn't trigger it with 1 or 3 pixels
> visible). Nevertheless, to be sure, I also applied the WA for these cases.
> 
> I also couldn't see any problem with the cursor plane and later Art
> confirmed that it's not affected, so the WA is applied only for the
> other plane types.
> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
> +       /*
> +        * Display WA #1175: cnl,glk
> +        * Planes other than the cursor may cause FIFO underflow and display
> +        * corruption if starting less than 4 pixels from the right edge of
> +        * the screen.
> +        */
> +       if ((IS_GEMINILAKE(dev_priv) || IS_CANNONLAKE(dev_priv)) &&
> +           dst_x > pipe_src_w - 4) {
> +               DRM_DEBUG_KMS("requested plane X start position %d invalid (valid range %d-%d)\n",
> +                             dst_x,
> +                             0, pipe_src_w - 4);
> +               return -EINVAL;

Should this be -ERANGE or -ENOSPC?
-Chris


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